Samsung Electronics
From Samsung Electronics's careers page
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The role will focus on the development of HBM, LPDDR PHY projects, delivering high‑performance PHY IP for our customers and providing post‑silicon support.
Position Summary
About Samsung Semiconductor India Research (SSIR)With a wide range of industry-leading semiconductor solutions, we are enabling innovative growth in market segments in component solutions, featuring industry-leading technologies in System LSI, Memory and Foundry. Our engineers are offered a foundation to work on cutting-edge technologies such as Foundation IP Design, Mobile SoCs, Storage Solutions, AI/ML, 5G/ 6G solutions, Neural processors, Serial Interfaces, Multimedia IPs and much more. As one of the largest R&D centers outside Korea for Samsung Electronics, we take pride in our ability to work on some of the cutting edge technologies. Our engineers get to work across diverse domains, projects, products, clients, people and countries, and conduct research in new and emerging technology areas. Innovation and creativity are highly valued at this innovation hub, as we strive towards providing high reliability; high performance and value added services that enable Samsung Electronics deliver world-class products.
Role and Responsibilities
Samsung Semiconductor India Research (SSIR) is seeking an experienced RTL/Logic Design Engineer to join the Memory PHY IP development team. The role will focus on the development of HBM, LPDDR PHY projects, delivering high‑performance PHY IP for our customers and providing post‑silicon support.
Write, verify, and maintain synthesizable RTL for LPDDR PHY blocks
Write SDC constraints, synthesize and ensure timing closure.
Setup and run IPXACT, LINT, CDC, SDC, PreSTA, DFT and ATPG checks
Support silicon validation bring-up and debug post-silicon issues
Work closely with internal and external customers to understand requirements and timely deliverables
4 years of full‑cycle RTL/logic design experience, preferably in memory‑PHY or high‑speed interface IP.
Strong RTL coding background (Verilog/SystemVerilog)
Proficiency with QC tools such as LINT, CDC, DFT, ATPG
Experience in SDC creation, Synthesis & STA
Prior work on LPDDR, HBM PHY projects is preferred
Experience – 4 to 10 Years of experience
B.Tech/B.E/M.Tech/M.E
Disclaimer
Samsung Semiconductor India Research (SSIR), a division of Samsung R&D India - Bangalore Pvt. Ltd is dedicated to employing a diverse workforce and providing Equal Employment Opportunity to all individuals, regardless of their religion, gender, age, marital status, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.
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