KEY RESPONSIBILITIES
Define product features and micro-architecture requirements. Create technical specifications for IP blocks to meet those requirements, and provide technical guidance to design teams
Work cross functionally with IP/Domain architects to identify and assess complex technical issues/risks and develop solutions to achieve product requirements
Work on high quality design deliverables with design qualifications like lint, CDC, synthesis and hand-off documentation
Knowledge sharing and other contributions to Platform & System Architecture
Work closely with Design teams for Area and Floorplan refinement, Verification Test plan reviews, Timing targets and sign offs
Support Post-Si teams for Product Performance, Power and functional issues debug/resolution
PREFERRED EXPERIENCE
A minimum of 10 years of experience is required
Proven experience in Silicon IP development process and design methodologies
Experience with Verilog RTL design, simulation, linting, CDC and other design qualifications, scripting etc..
Detailed understanding and proven track record of developing leading edge networking IP solutions such as Ethernet and industry standard security protocols
Detailed knowledge of PCIe is a plus
Excellent communication and presentation skills
Adept at collaboration among top-thinkers and senior architects with strong interpersonal skills to work across teams in different geographies
ACADEMIC CREDENTIALS
Bachelors or Masters degree in computer engineering/Electrical Engineering
#LI-SK3
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
RTL IP Design Engineer
THE ROLE
As a member of the Networking Technology Solutions Group, you will help bring to life cutting-edge designs. As a member of the front-end design/integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success.
This exciting position as MTS will provide the opportunity to demonstrate strong technical collaboration across the design hierarchy from architecture to productization. Join us in providing innovative IP solutions as we embark on our journey into delivering the leading-edge IP Solutions for data center networking solutions
THE PERSON
You have excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings, executive briefings, etc. You are highly adept at collaboration among top-thinkers and engineers alike, ready to mentor and guide, and help to elevate the knowledge and skills of the team around you.
KEY RESPONSIBILITIES
Define product features and micro-architecture requirements. Create technical specifications for IP blocks to meet those requirements, and provide technical guidance to design teams
Work cross functionally with IP/Domain architects to identify and assess complex technical issues/risks and develop solutions to achieve product requirements
Work on high quality design deliverables with design qualifications like lint, CDC, synthesis and hand-off documentation
Knowledge sharing and other contributions to Platform & System Architecture
Work closely with Design teams for Area and Floorplan refinement, Verification Test plan reviews, Timing targets and sign offs
Support Post-Si teams for Product Performance, Power and functional issues debug/resolution
PREFERRED EXPERIENCE
A minimum of 10 years of experience is required
Proven experience in Silicon IP development process and design methodologies
Experience with Verilog RTL design, simulation, linting, CDC and other design qualifications, scripting etc..
Detailed understanding and proven track record of developing leading edge networking IP solutions such as Ethernet and industry standard security protocols
Detailed knowledge of PCIe is a plus
Excellent communication and presentation skills
Adept at collaboration among top-thinkers and senior architects with strong interpersonal skills to work across teams in different geographies
ACADEMIC CREDENTIALS
Bachelors or Masters degree in computer engineering/Electrical Engineering
#LI-SK3
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
