Preferred Qualifications
Ph. D degree in Mechanical engineering, Material science, Electrical/Microelectronics, or related engineering field.
6+ years of combined experience in Finite Element modeling and Analysis for IC electronic package and interconnects.
3+ years of experience in ANSYS (APDL/Workbench).
4+ years of direct work experience in Semiconductor and IC microelectronic packaging industry.
Experience with the fundamentals of IC electronic packaging structures, assembly processes, reliability testing and analysis, CPI, Package-Board interaction, and design of experiments (DOE).
Solid understanding of IC packaging materials and their thermo-mechanical behaviors.
Hands-on FEA experience developing and improving BKMs for predictive modeling to guide package mechanical design and support manufacturing and reliability needs.
Experience with material characterization/testing and developing new test methods to improve package FEA model accuracy and prediction correlation.
Research and publications in FEA predictive modeling, Warpage, CPI, and Solder lifetime prediction (plus).
Experience using internal AI tools to accelerate APDL coding and improve simulation workflows (plus).
Strong analytical skills and a proven track record of project execution; excellent communication and presentation skills.
Self-starter with high motivation and a strong commitment to product success; able to work flexible hours to support collaboration across APAC and the U.S.; occasional domestic and international travel may be required.
Minimum Qualifications
- Bachelor's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 4+ years of System/Package Design/Technology Engineering or related work experience.
- OR
- Master's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 3+ years of System/Package Design/Technology Engineering or related work experience.
- OR
- PhD in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 2+ year of System/Package Design/Technology Engineering or related work experience.
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Pay range and Other Compensation & Benefits
$160,200.00 - $240,200.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.
If you would like more information about this role, please contact Qualcomm Careers.
