Investigate advanced packaging failure mechanisms such as bump crack, Cu pillar fracture, RDL cracking, TSV defects, substrate warpage, delamination, electromigration, solder fatigue, die crack, and thermomechanical stress-related failures.
Develop FA strategies for intermittent and low reproducibility failures under reliability stress conditions.
Correlate electrical signatures with physical defects to identify root causes across silicon, package, SMT, and system-level interactions.
Drive technical reviews and root cause investigations with OSATs, foundries, substrate suppliers, and assembly partners.
Support new package technology qualification and risk assessment activities.
Develop and improve FA methodologies, workflows, and standard operating procedures for advanced packaging technologies.
Document and communicate FA findings, corrective actions, and technical risk assessments to management and cross-functional teams.
Minimum Qualifications
Bachelor’s degree in Electrical Engineering, Electronics Engineering, Materials Science, Physics, or related field required. Master’s degree preferred.
10+ years of experience in semiconductor eFA/pFA, with strong focus on advanced packaging ASIC products.
Hands-on experience with electrical fault isolation techniques including ATE, Scan/ATPG, MBIST, EMMI, OBIRCH, TDR, SIL, and LSM.
Strong experience with physical FA tools and methodologies including FIB, SEM, TEM, cross section, X-ray, and CSAM.
Proven experience with advanced packaging reliability and package interaction failure mechanisms.
Strong understanding of semiconductor device physics, package structure, assembly process flow, and reliability stress behavior.
Experience developing FA strategies and driving root cause analysis to closure.
Preferred Qualifications
Experience with 2.5D/3D packaging, flip chip, wafer-level packaging (WLP), fan-out packaging (FOWLP/FOPLP), hybrid bonding, TSV, and high-density substrate technologies.
Knowledge of JEDEC reliability qualification standards and failure mechanisms under thermal cycling, HTOL, uHAST, drop, bend, and SMT processes.
Experience with OSAT process integration, package process mapping, and supplier quality management.
Familiarity with customer-return investigation, field reliability analysis, and high-volume manufacturing support.
Experience driving technical alignment across foundry, OSAT, substrate, and internal engineering teams.
Soft Skills
Strong technical leadership and structured problem-solving skills.
Ability to lead cross-functional and supplier discussions for complex reliability and quality issues.
Excellent communication and presentation skills.
Comfortable working in both laboratory and manufacturing environments.
Strong ownership mindset and ability to manage multiple high-priority FA cases simultaneously.
Ability to work effectively in fast-paced, global engineering environments.
SiOps
Why Cisco?
At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.
Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.
We are Cisco, and our power starts with you.
