Develop verification test plans that account for interactions across hardware, firmware, software drivers, and system-level use cases.
Estimate effort required for verification development, including test creation and updates to verification environments.
Develop directed and constrained-random verification tests.
Debug test failures, identify root causes, and partner with RTL and firmware engineers to resolve design and test issues.
Review functional and code coverage metrics and enhance verification content to achieve coverage objectives.
Contribute to verification methodology improvements that enhance quality, efficiency, and scalability.
PREFERRED EXPERIENCE
Experience with IP-level ASIC verification.
Experience debugging RTL and firmware using simulation and verification tools.
Experience working with UVM-based testbenches in Linux and Windows environments.
Knowledge of Verilog, SystemVerilog, C, and C++.
Understanding graphics pipeline architecture and associated verification challenges.
Experience developing UVM-based verification frameworks, methodologies, processes, and workflows.
Experience automating engineering workflows within distributed compute environments.
Exposure to simulation profiling, performance optimization, acceleration technologies, and HLS tools or methodologies.
Experience using C++ within Linux environments; exposure to Windows platforms is beneficial.
Knowledge of UVM methodologies and SystemVerilog verification concepts.
Familiarity with SystemC, TLM, and related modeling approaches.
Experience with scripting languages such as Perl, Ruby, shell scripting, or Makefiles.
Experience providing technical guidance, mentorship, or informal leadership within engineering teams.
Exposure to video codec technologies, multimedia systems, or related solutions is beneficial.
ACADEMIC CREDENTIALS
Bachelor's, Master's, or equivalent practical experience in Computer Engineering, Electrical Engineering, or a related technical field.
This role is not eligible for visa sponsorship.
#LI-DP1
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
THE ROLE
The focus of this role is to plan, develop, and execute verification activities for new and existing features within AMD’s graphics processor IP. Working closely with cross-functional engineering teams, you will help ensure high-quality silicon through comprehensive verification methodologies and early identification and resolution of design issues.
THE PERSON
You are a silicon verification engineer with experience in processor architecture, digital design, and verification methodologies. You communicate technical concepts effectively and collaborate successfully with engineers across geographically distributed teams. You apply strong analytical and problem-solving skills to complex technical challenges and demonstrate a commitment to continuous learning, quality, and excellence in engineering.
KEY RESPONSIBILITIES
Collaborate with architecture, hardware, and firmware teams to understand and verify new feature requirements.
Develop verification test plans that account for interactions across hardware, firmware, software drivers, and system-level use cases.
Estimate effort required for verification development, including test creation and updates to verification environments.
Develop directed and constrained-random verification tests.
Debug test failures, identify root causes, and partner with RTL and firmware engineers to resolve design and test issues.
Review functional and code coverage metrics and enhance verification content to achieve coverage objectives.
Contribute to verification methodology improvements that enhance quality, efficiency, and scalability.
PREFERRED EXPERIENCE
Experience with IP-level ASIC verification.
Experience debugging RTL and firmware using simulation and verification tools.
Experience working with UVM-based testbenches in Linux and Windows environments.
Knowledge of Verilog, SystemVerilog, C, and C++.
Understanding graphics pipeline architecture and associated verification challenges.
Experience developing UVM-based verification frameworks, methodologies, processes, and workflows.
Experience automating engineering workflows within distributed compute environments.
Exposure to simulation profiling, performance optimization, acceleration technologies, and HLS tools or methodologies.
Experience using C++ within Linux environments; exposure to Windows platforms is beneficial.
Knowledge of UVM methodologies and SystemVerilog verification concepts.
Familiarity with SystemC, TLM, and related modeling approaches.
Experience with scripting languages such as Perl, Ruby, shell scripting, or Makefiles.
Experience providing technical guidance, mentorship, or informal leadership within engineering teams.
Exposure to video codec technologies, multimedia systems, or related solutions is beneficial.
ACADEMIC CREDENTIALS
Bachelor's, Master's, or equivalent practical experience in Computer Engineering, Electrical Engineering, or a related technical field.
This role is not eligible for visa sponsorship.
#LI-DP1
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.
