Enhance the programming model and tooling that kernel and model developers rely on, improving usability and debugging workflows.
Identify and drive optimization opportunities across the Neuron software stack (compiler, runtime, frameworks).
Document software designs, operational runbooks, and performance findings so the broader team can build on your work.
A day in the life
You might start your morning reviewing profiling data from a customer's large diffusion model training job, tracing a utilization gap back to a specific kernel. After a design discussion with compiler engineers about a new operator fusion strategy, you spend the afternoon writing and benchmarking a kernel prototype. Later, you review a teammate's pull request for a runtime optimization and share your findings in a short write-up for the broader Neuron organization. Your work directly translates into faster model execution and lower cost for AWS customers running ML workloads at scale.
About the team
The Neuron Performance Engineering team in Tel Aviv is part of Annapurna Labs within AWS. Our mission is to make sure every ML workload running on Inferentia and Trainium chips reaches its full performance potential. We partner closely with compiler, framework, and hardware teams across Annapurna Labs, and we work directly with AWS customers to understand their models and unblock their adoption.
We are a newly formed group which is part of the larger Neuron organization. If you want to shape a team's technical culture from its earliest days while working on problems that matter to the future of AI infrastructure, we'd love to hear from you.
3+ years of non-internship professional software development experience
Knowledge of Python and/or C++ programming
Knowledge of computer architecture, operating systems, and parallel computing
Experience with PyTorch, TensorFlow, and/or JAX
Master's degree in Computer Science, Engineering, Mathematics, or a related field
Experience optimizing performance for LLM, Vision, or other deep-learning models
Experience with kernel writing or parallel programming (CUDA, Triton, CUTLASS, Pallas, Mojo, SIMD, MPI)
Experience with compiler optimization or hardware-software co-design
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