Validate cross-peripheral interactions with DMA, interrupts, clock switching, and low-power transitions
Lead fault-injection campaigns and functional safety validation evidence (ISO 26262)
Define pre-silicon to post-silicon correlation and test reuse strategy
Architect and maintain automation and CI/CD-integrated regression infrastructure
Define and own performance and benchmarking strategy, including throughput, latency, and timing-margin target.
Lead resolution of customer-reported issues through reproduction and root-cause analysis
Define fix or workaround recommendations for customers and drive them to closure
Lead validation reviews and provide sign-off recommendations
Mentor engineers and drive continuous improvement in methodology and tooling
Minimum requirements
Bachelor's degree in Electrical Engineering, ECE, Computer Engineering, or related field
5+ years of engineering experience working with silicon design and/or validation
Experience with digital/embedded design on emulation/FPGA platforms/RTL simulation
Preferred Qualifications
Work experience with ARM architecture
Advanced embedded C and firmware architecture knowledge
MCU/SoC architecture understanding (multicore, coherency, boot, power domains)
Expert-level peripheral validation, including complex interactions and error recovery
Emulation platform experience (QuickTurn, Palladium, ZeBu) and test infrastructure design
RTL and waveform debugging for SoC-level issues
Deep understanding of ISO 26262, AUTOSAR, and CAN FD / LIN / Ethernet
Functional safety subsystem validation and safety-case evidence
Complex DMA and bus (arbitration, ordering, timeout) validation
SystemVerilog and advanced RTL debugging
Track record of building and mentoring validation teams, or publishing technical work
Excellent technical communication and documentation skills