What You'll Be Doing
Lead technical deployment of VC Formal at customer sites, assessing their verification environments and recommending formal methodologies that fit their design challenges
Analyze customer design blocks to identify the right candidates for formal property checking, sequential equivalence, connectivity checking, and formal coverage analysis
Diagnose root causes of tool performance issues and design complexity bottlenecks, then optimize formal testbench modeling to achieve proof closure
Develop and deliver technical training on VC Formal features, product updates, and formal verification best practices
Work with Synopsys R&D teams to communicate customer priorities and technical requirements that influence product roadmap
Apply formal verification across data path logic, math function proofs, sequential equivalence checking, and formal coverage closure
The Impact You Will Have
Enable customers to catch critical design bugs earlier, reducing costly respins and time to tapeout
Drive measurable improvements in formal tool performance and proof convergence through optimized modeling
Influence the VC Formal product roadmap by translating customer pain points into actionable R&D priorities
Expand formal verification adoption by demonstrating clear ROI and building internal customer champions
Build reusable formal methodologies that scale across multiple customer engagements and design domains
What You'll Need
4 to 8 years of hands-on experience applying formal verification in semiconductor design or verification roles
Deep expertise in formal property checking, including writing assertions, constraints, and assumptions for complex digital designs
Proven experience with sequential equivalence checking, formal coverage analysis, and connectivity checking methodologies
Strong understanding of formal verification theory, including state space exploration, abstraction techniques, and proof convergence strategies
Experience diagnosing and resolving formal tool performance issues and testbench modeling optimization
Ability to assess customer verification environments and recommend tailored formal solutions
Who You Are
You can walk into a customer meeting, listen to their verification pain points, and sketch out a formal methodology that makes immediate sense
You treat failed proofs as puzzles to solve, methodically working through abstraction and constraints until they close
You can explain why an assertion is vacuous or a constraint is overconstrained without making someone feel like they did it wrong
You are comfortable saying 'formal is not the right fit here' when simulation would be faster, because credibility matters more than a tool sale
You can manage multiple customer engagements simultaneously without dropping threads or missing commitments
The Team You'll Be Part Of
Application engineers (AEs) drive and deploy SNPS technologies at the customers and support successful usage of the products at the customers that leads to renewals and new business.
Rewards and Benefits
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
