What You’ll Be Doing
Independently own and drive full EMIR analysis and signoff closure for advanced process nodes (7nm/5nm/3nm), ensuring successful tape-outs.
Execute PDN implementation, Static & Dynamic Signal/Power EM & IR Drop analysis with or without vectors, Peak Current Analysis, EMIR ECO generation, and full SoC Power Integrity signoff to meet stringent performance and power targets. Perform block-level, sub-system level and full-chip PDN implementation, EMIR analysis, and trade-off between EMIR signoff closure and timing closure activities. Collaborate with cross-functional teams across geographies to resolve complex design challenges and ensure design quality and schedule adherence.
Utilize and optimize Synopsys EDA tools, including Redhawk, Redhawk-SC, PrimeRail and PrimePower, to deliver state-of-the-art silicon solutions.
Develop and maintain automation scripts in Python, PERL, TCL, or other relevant languages to streamline design flows and improve efficiency.
Contribute to the continuous improvement of design methodologies and best practices, sharing insights and mentoring junior engineers as needed.
The Impact You Will Have
Accelerate the delivery of high-performance, low-power silicon solutions that power next-generation technology platforms worldwide.
Enable Synopsys customers to achieve first-pass silicon success through robust and innovative PDN implementation, EMIR analysis & signoff closure.
Drive technical excellence and best practices within the team, influencing the future direction of EMIR signoff methodologies at Synopsys.
Foster a collaborative and inclusive culture by working seamlessly with global teams and sharing technical expertise.
Contribute to Synopsys’ leadership in EDA tools adoption, providing valuable feedback to enhance product offerings and customer satisfaction.
Support strategic customer engagements and help expand Synopsys' presence in the semiconductor ecosystem through successful project outcomes.
What You’ll Need
Bachelor’s or Master’s degree (BE/BTech/MTech or equivalent) in Electronics, Electrical Engineering, or a related field.
5+ years of relevant experience in EMIR analysis & signoff closure, and particularly in advanced technology nodes (7nm/5nm/3nm). PDN implementation experience will be preferred. Comprehensive hands-on experience with EMIR flows, including PDN design, Static & Dynamic Signal/Power EM & IR Drop analysis with or without vectors, Peak Current Analysis, EMIR ECO generation, and full SoC Power Integrity signoff.
Proficiency with Synopsys EDA tools such as Redhawk, Redhawk-SC, PrimeRail, and PrimePower.
Strong scripting and automation skills using Python, PERL, TCL, or similar languages.
Solid understanding of EMIR, power integrity, reliability concepts, and power-planning techniques for both block-level and full-chip designs.
Exposure to high-frequency design and low-power design methodologies.
Who You Are
Proactive, self-motivated, and driven to achieve technical excellence.
Exceptional problem-solving and analytical skills with a keen attention to detail.
Excellent communication and interpersonal abilities, comfortable working in diverse and global teams.
Collaborative team player who values knowledge sharing and mentoring others.
Adaptable and open to learning new technologies and methodologies in a rapidly evolving field.
The Team You’ll Be A Part Of
You’ll join a world-class team of Backend Engineers at Synopsys, dedicated to delivering innovative system design solutions for our global customers. Our team thrives on collaboration, technical excellence, and a shared passion for pushing the boundaries of semiconductor design. Working closely with experts across multiple domains, you will play a key role in empowering customers to achieve their silicon goals while contributing to Synopsys’ leadership in the industry.
Rewards and Benefits
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
