What You'll Be Doing
Partner with semiconductor companies across the region on Low Power verification challenges including power estimation, reduction, audit, correlation, and signoff
Deploy and support Synopsys Low Power tools including PrimePower-RTL, SpyGlass-Power, VC LP, PTPX, and RTL Architect for customer projects from methodology setup through tapeout
Work directly with customer design and verification teams to debug power reports, resolve UPF issues, and optimize flows for PPA (Performance, Power, Area) targets
Collaborate with Synopsys R&D and product validation teams to develop methodologies that solve real customer problems and drive product improvements based on deployment feedback
Lead technical engagements with customers to establish end-to-end Low Power flows including power exploration, memory power analysis, glitch analysis, and emulation-based power profiling
Develop automation scripts in Tcl, Perl, and Unix Shell to streamline power analysis, correlation workflows, and reporting for customer deployments
Coordinate with technical account managers and global AE teams to form strategies that drive adoption of Synopsys Low Power solutions and enable customer project success
The Impact You Will Have
Enable customers to meet aggressive power budgets and ship complex SoCs on schedule by deploying robust Low Power verification and signoff flows
Reduce power-related respins and late-stage design changes that cost customers months of schedule and millions in engineering effort
Drive adoption of industry-leading Low Power methodologies across the region's semiconductor ecosystem, from mobile and automotive to data center and AI chips
Shape the Low Power product roadmap by surfacing real customer pain points, correlation gaps, and methodology challenges that R&D needs to address
Build long-term technical relationships with design teams that make Synopsys the trusted partner for their most critical power challenges
Accelerate time-to-market for customers by helping them catch power issues at RTL before they become netlist-level crises
Strengthen Synopsys' competitive position in Low Power by proving out flows, winning evaluations, and demonstrating measurable power reduction and correlation accuracy
What You'll Need
Bachelor's or Master's degree in Electronics Engineering, Computer Science, or Microelectronics with 5+ years of industry experience in Low Power design or applications engineering
Deep hands-on experience with end-to-end Low Power flows and LP signoff, including power estimation, reduction, audit, and correlation
Proven working knowledge of Synopsys Low Power tools such as PrimePower-RTL (logical and physical modes), SpyGlass-Power, VC LP, PTPX, or RTL Architect
Strong expertise in UPF-based Low Power verification, power domain analysis, retention strategies, isolation cells, and power state management
Solid understanding of PPA challenges and analysis, including memory power, glitch power, and emulation-based cycle-accurate power profiling
Advanced scripting skills in Tcl, Perl, and Unix Shell for automation, debugging, and custom flow development
Exceptional knowledge of Verilog, VHDL, SystemVerilog RTL, and ASIC design flows from RTL through netlist-level power signoff
Who You Are
You can look at a power report with 10,000 instances and immediately know which three things are driving the problem
Comfortable explaining to a customer why their RTL power estimate does not match their gate-level numbers and what to fix in their UPF to close the gap
You manage multiple customer engagements across different companies and project stages without losing track of what is blocking each one
Self-directed enough to own a Low Power deployment from kickoff through signoff without waiting for someone to tell you the next step
You build relationships with customer design leads and R&D engineers that last beyond a single project, becoming their go-to expert when power gets hard
Open to travel across the region for onsite customer engagements, methodology workshops, and technical deep dives when it moves the work forward
The Team You'll Be Part Of
You will join the regional Applications Engineering team supporting semiconductor companies across the area on their most complex Low Power verification and signoff challenges. This team works closely with global AE experts, R&D, product validation, and technical account managers to deliver end-to-end solutions that drive customer success and business growth. Your recruiter will share more about team structure, coverage model, and collaboration dynamics during the interview process.
Rewards and Benefits
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
