What You’ll Be Doing
Driving the design and development of medium to large complexity analog circuits for high-speed SerDes products supporting Ethernet and PCIe standards.
Guiding analog designers to ensure designs meet electrical specifications and reliability constraints.
Defining methods and procedures for project execution, including planning analog design activities and associated milestones.
Conducting and preparing design reviews, following up on improvements, and ensuring high quality outcomes.
Evaluating and minimizing parasitic effects related to layout implementations, collaborating with layout teams to optimize performance, power, and area.
Ensuring silicon correlation with simulation results, validating design accuracy and robustness.
Mentoring and training less experienced analog designers, fostering skill development within the team.
Engaging with a global, multi-cultural, and cross-functional R&D team, contributing to a collaborative and innovative work environment.
The Impact You Will Have
Drive the development of industry-leading SerDes products used in diverse markets such as mobile, automotive, AI, HPC, IoT, 5G, and storage.
Enhance product reliability and performance through rigorous design reviews and optimization practices.
Drive innovation by implementing advanced FinFET/GAA process nodes in analog integrated circuits.
Strengthen cross-functional collaboration, enabling seamless integration of analog and mixed signal designs.
Contribute to Synopsys’ reputation as the provider of high-quality, silicon-proven IP solutions.
Mentor and develop junior engineers strengthening the team’s capability and talent pipeline for future challenges.
What You’ll Need
M.Sc. in Electrical Engineering with 8+ years of experience, or Ph.D. in Electrical Engineering with 6+ years of experience.
Proven track record in CMOS analog design, preferably including hands-on experience with ADC, DAC, PLL, Rx, Tx, References, etc.
Experience coordinating design activities across teams and managing medium complexity designs.
Familiarity with industry-standard IC design packages and EDA tools.
Experience working in UNIX operating systems.
System-level knowledge of SerDes architecture is a plus.
Strong written and verbal communication skills in English.
Who You Are
Collaborative team player who thrives in multicultural, global environments.
Analytical thinker with strong problem-solving and organizational skills.
Effective communicator, able to lead reviews and share knowledge clearly.
Proactive, detail-oriented, and committed to high standards of reliability and performance.
Inclusive and open-minded, embracing diversity in perspectives and backgrounds.
Open to learning and mentoring, fostering growth for yourself and others.
The Team You’ll Be A Part Of
You will join Synopsys’ fast-growing analog and mixed-signal R&D team, dedicated to developing the highest data rate SerDes IP in advanced FinFET/GAA process nodes. The team is global, dynamic, and cross-functional, working collaboratively to deliver world-class products that power innovations across multiple industries. You’ll have opportunities to interact with experts from diverse backgrounds, contribute to cutting-edge projects, and shape the future of silicon IP.
Rewards and Benefits
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
