What You'll Be Doing
Lead physical design engagements for strategic semiconductor customers working on advanced-node designs, from floorplanning through signoff
Develop and optimize RTL-to-GDSII methodologies that improve PPA, reduce runtime, and accelerate design closure for production tapeouts
Build automation frameworks using Python and Tcl that solve real productivity bottlenecks in placement, CTS, routing, and timing closure workflows
Collaborate with Product Engineering and global R&D teams to validate new Synopsys implementation technologies and translate customer feedback into product requirements
Drive technical evaluations and benchmarking programs that demonstrate measurable improvements in customer design metrics
Support advanced-node enablement and DTCO initiatives in partnership with foundries and customer design teams
Mentor engineers across the Korea team and contribute to technical leadership on methodology development and customer engagement strategy
The Impact You Will Have
Enable successful tapeouts for leading semiconductor companies working on AI accelerators, mobile SoCs, HPC, and memory designs at 5nm and below
Deliver methodology improvements that directly reduce customer design cycle time and improve power, performance, and area outcomes
Influence the product roadmap for Synopsys implementation tools based on real customer needs and advanced-node challenges you identify
Accelerate engineering productivity across customer teams through automation solutions that eliminate manual bottlenecks in physical design flows
Build long-term technical partnerships with strategic customers that drive adoption of Synopsys technologies and expand deployment across their design organizations
Shape the future of physical design methodologies by integrating emerging technologies like AI-assisted workflows into production-ready solutions
Grow technical capability within the Korea team through mentorship and knowledge sharing that elevates the entire organization
What You'll Need
BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field
15+ years of hands-on experience in semiconductor physical design, implementation methodologies, or EDA development
Deep expertise across the RTL-to-GDSII flow including floorplanning, placement optimization, clock tree synthesis, routing, timing closure, power optimization, and physical verification
Strong proficiency in Python and Tcl for building automation frameworks and productivity tools
Demonstrated experience working directly with semiconductor customers to solve complex implementation challenges and deploy methodologies in production environments
Fluency in Korean and English with the ability to lead technical discussions, present to executive stakeholders, and document methodologies in both languages
Experience with Fusion Compiler, IC Compiler II, PrimeTime, or equivalent implementation and signoff tools is a strong plus
Who You Are
You can walk into a customer meeting, listen to a design challenge, and sketch out a methodology solution on the whiteboard that the team believes will work before you leave the room
You write automation that other engineers actually use because you understand the difference between a script that works once and a tool that scales across a team
You push back when a product feature does not solve the real customer problem, and you do it in a way that helps R&D build something better
You debug timing closure issues, congestion hotspots, and power violations with the same rigor whether it is your design or a customer's, because you care about getting it right
You mentor engineers by showing them how you think through a problem, not just handing them the answer
You stay current on advanced-node challenges, foundry roadmaps, and emerging technologies because you know that what worked at 7nm will not be enough at 3nm
The Team You'll Be Part Of
You will be part of a high-performing Physical Design Team supporting some of the world's most advanced semiconductor companies. The team works closely with strategic customers, Product Engineering, and global R&D organizations to solve complex implementation challenges, enable advanced-node designs, and drive successful adoption of Synopsys technologies.
Our team combines deep physical design expertise with strong customer engagement and a focus on methodology development, helping shape future implementation flows while delivering measurable value to customers. We value technical excellence, collaboration, ownership, and continuous learning, creating an environment where engineers can grow, lead complex engagements, and make a lasting impact on the semiconductor industry.
Rewards and Benefits
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
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