Synopsys
From Synopsys's careers page
Status: listed on the employer's own careers page when we last checked (daily). Confirm on their site before applying.
In this role you will be responsible for developing test benches and verifying integrated IP Subsystems for our global customers.
Our LPDDR PHY IP team is looking to add a Digital ASIC Verification Engineer to our team. In this role you will be responsible for developing test benches and verifying integrated IP Subsystems for our global customers.
BSEE in EE with 6+ years of relevant experience or MSEE with 3+ years of relevant experience
Experience in ASIC RTL design and verification at the chip level and block level
Strong Verilog, system Verilog, UVM, PERL, and TCL skills
Knowledge in silicon debugging
Demonstrates good communication skills in both Mandarin and English
Demonstrates good analysis and problem-solving skills
Knowledge of high speed interface protocols is a plus
A free account lets you apply, save this job, see how well you match and check your resume against it.
Scores your resume against this job the way resume scanners do: the job's hard and soft skills, searchability, recruiter tips and formatting.
Create a free account to see your score. Your resume stays in this browser until then, and we never store it.
Already a member? Sign in