General responsibilities include
Collaboration with the sales team to identify & understand our customers’ technical & business challenges
Co-work with customers to develop ASIC/SoC micro-architecture, leveraging the broad Synopsys IP portfolio
Enabling our customers on how the IP products meet their needs and helping them evaluate it (with support from other teams) relative to their requirements
Influencing the IP product development roadmap by communicating customer needs to the product engineering teams
Requirements
BSEE with 8+ years of relevant experience, or MSEE with 5+ years of relevant experience in ASIC/SoC design
Either of the following requirements for the applicants should be satisfied.
Design or integration experience with single or multiple high-speed interfaces, such as DDR/LPDDR, PCIe/CCIX/CXL, Serdes, MIPI(CSI/DSI/UFS), Ethernet, USB, HBM, XSR/UCIE/HBI die-to-die, HDMI/DP, etc.
ASIC/SoC micro-architecture design including bus fabric, CPU/GPU, address mapping, and various high-speed interfaces, as mentioned above
Familiarity with state-of-art SoC design implementation
RTL design and verification using Verilog or SystemVerilog
Synthesis and static timing analysis, physical design flow, testbench creation and simulation
Strong technical communication skills in both Mandarin and English
Ability to understand and present complex technical requirements, problems, and solutions concisely in verbal and written communications
Ability to analyze, summarize and generate status updates from technical data
Ability to organize, conduct and co-ordinate meetings involving multiple teams internal and external
Synopsys is committed to fostering an environment that treats people with respect, honesty, and professionalism.
