Build and maintain Tcl-based automation, dashboards, and project infrastructure — and apply AI to accelerate the work (e.g., triaging flow logs, summarizing QoR trends, drafting and refactoring scripts).
Debug flow failures end to end: analyze reports, isolate root cause, and drive issues to closure with design, verification, DFT, and implementation teams.
Improve documentation, handoff criteria, and reusable collateral so execution stays consistent across IP programs.
The Impact You Will Have
Higher-quality RTL-to-physical-design handoffs and lower implementation risk.
Faster, more scalable execution through stronger automation and AI-enabled analysis.
Synthesis, DFT, static, formal, and power issues caught earlier in the cycle.
Tighter collaboration across the RTL-to-implementation chain.
Robust, implementation-ready soft IP shipped with clear constraints, checks, and release collateral.
What You’ll Need(Core)
Working knowledge of ASIC design, verification, and mid-end development flows, typically gained through 5+ years of relevant experience or equivalent project work.
Hands-on synthesis experience, with the ability to analyze and resolve synthesis issues.
Strong Tcl scripting skills and a practical, automation-first mindset.
Familiarity with at least two of: DFT concepts, static checking (SpyGlass or equivalent), formal equivalence (e.g., Formality), or power analysis — and willingness to grow across the rest.
Ability to use AI tools effectively to accelerate debugging, summarize results, and improve scripts and flows.
Strong analytical, problem-solving, communication, and documentation skills.
BS/MS in Electrical/Computer Engineering or equivalent experience.
Nice to have
Experience across the full mid-end set: DFT, SpyGlass, Formality, and power analysis.
IP development methodologies, IP packaging, or reusable IP delivery / release collateral.
Hands-on with Synopsys tools such as Fusion Compiler and VC SpyGlass.
Who You Are
Proactive, curious, and adaptable.
Collaborative and ethical.
Flow-oriented, AI-aware, and quality focused.
Resilient and results oriented.
The Team You’ll Be A Part Of
You’ll work with a high-impact High-Performance-Compute team focused on delivering complex IP to the marketplace. You will collaborate across RTL design, verification, DFT, physical design, methodology, and project infrastructure teams to improve mid-end readiness and enable predictable downstream implementation.
Rewards and Benefits
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Your recruiter will provide more details about salary and benefits during the hiring process.
