Synopsys
From Synopsys's careers page
Status: listed on the employer's own careers page when we last checked (daily). Confirm on their site before applying.
At Synopsys, you will shape the future of PCIe Gen7, Gen8, and AI-driven design methodologies that matter across the industry.
We Are
Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.
You Are
You are an expert professional that has spent years deep in analog and mixed-signal design. You have built SerDes, PLLs, CDRs, high-speed interfaces, and you know what it takes to get them working not just in simulation, but in silicon, in a customer's system, under real conditions. At Synopsys, you will shape the future of PCIe Gen7, Gen8, and AI-driven design methodologies that matter across the industry. You take the ownership of technology roadmap ownership, cross-organizational influence, and development of future leaders and you lead by influence as much as authority. You mentor senior engineers, and you build the kind of team culture where people want to solve hard problems together.
Lead analog and mixed-signal design teams working on high-speed interfaces including PCIe Gen7, Gen8, SerDes, PLLs, CDRs, ADC/DAC, and power management IP.
Review and guide design architectures, evaluate performance tradeoffs, and solve complex technical challenges across active projects.
Drive the adoption of AI-driven design methodologies, predictive modeling, simulation acceleration, and automation tools to improve engineering productivity.
Build, mentor, and grow teams of engineers, technical leads, and managers across multiple sites, fostering accountability and technical excellence.
Align cross-functional teams including analog, digital, layout, verification, CAD, methodology, and product engineering to remove bottlenecks and drive execution.
Lead customer engagements, technical reviews, and escalations with strategic customers, translating their needs into actionable engineering solutions.
Own strategic programs from concept through deployment, including resource planning, risk management, and delivery across the organization.
The Impact You Will Have
Define the technical roadmap for next-generation PCIe and SerDes technologies powering AI, data center, networking, and high-performance computing platforms.
Accelerate time to market and improve product quality by championing AI-assisted design workflows and engineering automation across the organization.
Build and retain top engineering talent, creating an environment where engineers work on industry-leading connectivity solutions that shape the future.
Influence investment priorities and strategic decisions that position Synopsys as a leader in high-speed interface IP.
Drive measurable improvements in design efficiency, silicon success rates, and customer satisfaction across multiple product lines.
Establish best practices and common methodologies that scale across global teams and improve collaboration.
Deliver innovations that directly improve the competitiveness and profitability of Synopsys IP offerings.
Bachelor's or Master's in Electrical Engineering, Electronics Engineering, or related field with 12+ years of analog/mixed-signal IC design experience.
Proven track record managing engineering teams and delivering complex analog IP products to production, including SerDes, high-speed interfaces, or related technologies.
Deep technical expertise in analog design fundamentals, high-speed signaling, PLL/CDR architectures, or power management circuits.
Experience driving cross-functional initiatives across analog, digital, layout, verification, and product engineering teams in a multi-site environment.
Demonstrated ability to lead customer engagements, technical reviews, and escalations with strategic customers.
Strong technical judgment to evaluate architecture tradeoffs, manage risk, and make decisions balancing performance, schedule, quality, and cost.
Experience with AI-driven design methodologies, automation, or engineering productivity initiatives is a strong plus.
Strategic, technically credible, and highly collaborative.
Skilled at balancing quality, performance, schedule, and business priorities.
An effective communicator who translates technical complexity into clear business outcomes.
Passionate about developing talent and creating high-performing teams.
Committed to operational excellence, innovation, and continuous improvement.
The Team You'll Be Part Of
You will lead engineering teams responsible for shaping the future of PCIe Gen8 connectivity and AI-driven semiconductor innovation. You will lead AI-driven innovations in design automation, predictive analytics, simulation acceleration, and engineering productivity while shaping technology roadmaps with company-wide impact. This role offers the opportunity to work on industry-leading technologies, influence long-term product strategy, and drive innovations that power next-generation AI, cloud, and high-performance computing platforms.
Rewards and Benefits
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
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