Splunk
From Splunk's careers page
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We are looking for a Senior Design Verification Engineer to drive ASIC functional verification for Cisco Silicon One chips.
We are looking for a Senior Design Verification Engineer to drive ASIC functional verification for Cisco Silicon One chips. Collaborate with global teams on system-level verification and support various development stages. Ideal for candidates with advanced SystemVerilog/UVM expertise and significant experience in digital logic verification.
Skills: verilog, functional verification, systemverilog, uvm, digital logic design verification, scripting abilities, pcie, spi, i2c, jtag, cpu, emulation, simulation support, architectural discussions, transparency, very large scale integration (vlsi), universal verification methodology, debug skills, debug, formal verification, system integration, specman, scripting
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