ASIC Engineering Lead

Exciting opportunity for an ASIC Engineering Lead to drive the physical implementation of advanced networking chips at Cisco’s Silicon One. Lead end-to-end design from RTL to tape-out, ensuring high performance and reliability. Ideal for experienced professionals with deep expertise in ASIC design and physical implementation.

Skills: asic design, physical implementation, cmos technologies, block-level synthesis, place and route, timing closure, static timing analysis, physical verification, sign-off analysis, gdsii, technical leadership, tape-out, em/ir analysis, esd analysis, tcl, python, shell scripting, hardware design methodologies, mentoring