Splunk
ASIC Design Verification Engineer || Verilog, UVM, Testbench | Emulation || Exp 7+ years
- Bangalore, India · On-site
- Salary not published
- Posted 4 weeks ago
From Splunk's careers page
Status: listed on the employer's own careers page when we last checked (daily). Confirm on their site before applying.
About the role
We are looking for an ASIC Design Verification Engineer to develop and execute verification strategies for complex hardware designs, focusing on emulation platforms.
What they ask for vs. your profile
Must have
- Training and coaching