Experience – {8 – 14 } years of experience Firmware Development
Architectural Leadership: Lead the architecture and design of firmware for CXL-based memory devices and ensure alignment with hardware and software requirements.
Firmware Development: Develop and validate high-performance firmware for FPGA/ASIC-based products. Ensure scalability, reliability, and maintainability of the codebase.
Mentorship & Collaboration: Mentor junior engineers, develop subject matter experts within the team, and foster technical excellence.
Documentation & Standards: Create high-quality design documents, adhere to industry standards, and follow robust documentation practices.
Cross-Team Interaction: Collaborate closely with hardware and software teams to align development efforts.
Process Adherence: Champion software development lifecycle (SDLC) practices, including Agile methodologies, to deliver quality products on time.
Debugging & Optimization: Utilize tools such as JTAG debuggers, logic analyzers, and exercisers to debug and optimize firmware.
Skills Required
Essential
8 –14 years of firmware development experience for CXL, PCIe, or storage/memory devices.
Proficiency in C and C++ programming.
Hands-on experience with FPGA/ASIC-based products.
Expertise in any Embedded RTOS (e.g., FreeRTOS, Zephyr).
Strong knowledge of Operating system programming concepts.
In-depth understanding of ARM architecture for embedded devices.
Hands on experience in developing secure firmware/bootloaders for ARM or RISC-V based systems.
Proficiency with debugging tools and techniques (e.g., JTAG, logic analyzers).
Ability to comprehend and implement specifications, standards, and datasheets.
Proven track record of architecting firmware with a modular design approach, leveraging abstraction layers to ensure scalability, maintainability, and reusability.
Preferred
Knowledge of Linux Kernel internals/programming, memory management, NUMA subsystem, device drivers and interaction with ACPI/UEFI tables.
Familiarity with DDR5/4 specifications and memory controllers.
Understanding of PCIe & CXL protocols.
Skills and Qualifications
Qualifications
B.Tech/B.E/M.Tech/M.E
Disclaimer
Samsung Semiconductor India Research (SSIR), a division of Samsung R&D India - Bangalore Pvt. Ltd is dedicated to employing a diverse workforce and providing Equal Employment Opportunity to all individuals, regardless of their religion, gender, age, marital status, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.
Please visit Samsung membership to see Privacy Policy, which defaults according to your location. You can change Country/Language at the bottom of the page. If you are European Economic Resident, please click here.