Architect, develop, and maintain scalable SystemVerilog/UVM environments, including agents, drivers, monitors, scoreboards, predictors, reference models, and functional coverage.
Lead constrained-random, directed, assertion-based, formal-assisted, emulation, and post-silicon verification activities as appropriate.
Develop verification methodologies that provide effective checking of control logic, datapaths, pipelines, interfaces, memory transactions, and corner-case behavior.
Drive debug of complex failures across simulation, regressions, emulation, and silicon, identifying root causes and coordinating corrective actions.
Establish coverage closure strategies and review functional, code, assertion, and scenario coverage to ensure verification completeness.
Mentor verification engineers, conduct design and code reviews, and raise the technical capability of the broader DV team.
Influence architecture and microarchitecture by identifying verification risks, improving observability, and recommending design-for-verification features.
Collaborate with RTL, architecture, performance, power, physical design, software, and system teams to resolve issues and deliver high-quality hardware.
Contribute to verification infrastructure, regression automation, reusable VIP, checkers, methodologies, and productivity improvements.
Represent the verification team in technical reviews and provide clear status, risk, and sign-off recommendations to project leadership.
Required Qualifications
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
Typically 8+ years of relevant experience in digital design verification, with demonstrated technical leadership on complex projects.
Deep hands-on experience with SystemVerilog and UVM-based verification environments.
Strong understanding of digital verification methodology, including verification planning, constrained-random testing, assertions, scoreboards, reference models, coverage, regression, and debug.
Proven experience owning verification of complex IP, subsystems, or SoC components through coverage closure and sign-off.
Strong knowledge of verification planning and metric-driven verification processes.
Experience with protocol verification and transaction-level checking; knowledge of AMBA protocols such as AXI and AHB is highly desirable.
Experience developing reference models in C/C++, Python, or another high-level language.
Experience with simulators, waveform/debug tools, regression systems, and common RTL quality flows.
Strong analytical, debugging, communication, and collaboration skills.
Ability to work independently, influence technical decisions, and deliver results in a fast-paced, multi-disciplinary environment.
Preferred Qualifications
Prior verification experience with CPU or GPU architectures.
Prior work on memory controller designs, memory subsystems, or high-bandwidth data movement is a significant advantage.
Prior experience verifying DMA engines, interconnects, caches, coherency, or complex data-path architectures.
Experience with UVM register models, protocol VIP, assertion-based verification, formal verification, emulation, or FPGA prototyping.
Knowledge of microprocessor architecture, GPU pipelines, memory hierarchies, arbitration, cache behavior, or performance validation.
Experience with verification planning and reporting tools, coverage databases, and large-scale regression infrastructure.
Experience driving cross-functional technical initiatives and mentoring engineers across locations.
What We Offer
The opportunity to work on advanced GPU and SoC technologies.
Technical ownership across the complete digital verification lifecycle.
Collaboration with experienced architects, RTL designers, verification engineers, and software teams.
A technically challenging and inclusive engineering environment.
Opportunities to influence verification methodology, infrastructure, and product quality.
Professional growth through technical leadership, mentoring, and cross-functional collaboration.
Minimum Qualifications
- Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 4+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
- OR
- Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 3+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
- OR
- PhD in Computer Engineering, Computer Science, Electrical Engineering, or related field and 2+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.
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Pay range and Other Compensation & Benefits
€50,400.00 - €76,800.00 annual (Gross)
The above pay range reflects the broad, minimum to maximum, pay range for this job code for the location for which it has been posted. This range includes two additional months of pay as part of the annual salary. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our benefits at this link.
If you would like more information about this role, please contact Qualcomm Careers.
