Define, prototype, and evaluate new power features early, leveraging pre‑silicon platforms (emulation, models, trace‑based studies) and carrying them through post‑silicon bring‑up, validation, and productization
Own post‑silicon power KPI execution (Day-of-Use (Battery Life), game and multimedia use-cases), including root‑cause debug, power walks, correlation, and systematic optimization across HW/SW boundaries
Perform software trade‑off analysis using rapid prototyping, experiments, and trace‑driven studies to assess alternative scheduler, DVFS, low-power mode, and system‑level design choices under real workloads.
Identify and deliver power optimization opportunities by tuning or developing firmware, Linux kernel, and system algorithms (e.g., scheduler, LPMs, bus/DDR scaling, SoC power state transitions) aligned with evolving hardware architectures.
Contribute to and scale power debug, analysis, and automation infrastructure, including power telemetry, tooling, and AI‑assisted workflows, to improve execution velocity, coverage, and quality across platforms and geographies.
Skills/Experience
Strong foundation in computer architecture and system design, including memory management and hierarchies, CPU/GPU architectures, and operating system fundamentals such as processes, threads, and scheduling.
Proven embedded software development expertise, with the ability to design and implement moderately complex systems software; hands‑on experience with firmware and Linux kernel development is required.
Solid understanding of electrical engineering and digital logic fundamentals; familiarity with low‑power design principles and power‑saving techniques is a strong plus.
Effective communicator and collaborative team player, capable of working independently while contributing productively in cross‑functional, multi‑disciplinary environments.
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