We are excited to add folks with us for the most cutting-edge work. Here, individuals would have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability.
We offer a fun, creative and flexible work environment, with a shared vision to build products to change the world.
Desired experience
5+ years of experience in Physical design, STA in CPU Domain.
Solid understanding industry standard tools for physical implementation [ Genus, Innovus, FC, PT, Tempus, Voltas and redhawk].
Solid grip from floorplan to PRO and timing signoff along with understanding of IR drop and physical verification aspect.
Should have experienced about preparing complex ECOs for timing convergence [ across huge set of corners] through Tweaker / Tempus / Physical PT ECOs.
Should be aware about the tricks for minimizing power.
Experience in deep submicron process technology nodes is strongly preferred.
Knowledge of high performance and low power implementation methods is preferred.
Willing to push PPA to the best possible extent.
Strong fundamentals.
Expertise in Perl, TCL language
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