Job responsibilities for this position include
Design of customer reference board and evaluation kits and working closely with PMIC IC designers and Test HW platform teams for optimizing performance and cost on test hardware platforms.
Develop and publish PMIC PCB design guidelines, schematic, BOM selection and PCB layout (by working closely with CAD engineer) based on interaction with chipset architecture, chip design and test teams.
Experience in Mentor PADs Logic and PADs Layout, DxDesigner and Expedition is desirable but not essential.
Perform the required board level simulations (based on Power Integrity and Signal Integrity tools) to review and sign off on hardware designs developed by various test teams.
Responsible for characterizing and publishing performance and cost optimized reference BOM lists (power inductors, capacitors, third party components etc) based on component characterization and BOM reduction and optimization tests in lab.
Required for the Role
Able to work with common lab test equipment (oscilloscope, spectrum analyzer, logic analyzer, network and impedance analyzer, etc.).
Experience in Power Management (SMPS, LDO, battery chargers, Clocks, ADC) PCB design and component selection including CAD interface.
Experience in high layer count multilayer boards (6/8/10 layers) preferred.
Good understanding of common Signal and Power Integrity issues on test hardware and ability to identify and provide alternate solutions using Signal and Power Integrity simulators (eg. powerSI, SIWave, Ansys) is also a plus.
Preferred Qualifications
3+ years of mobile phone or similar product experience in power systems, power grid analysis and design, hardware or PMIC transistor level design or design/development of design tools and test automation tools.
3+ years of experience in one or more of the following areas: SMPS, LDO, Buck Converters, Boost Converters, Clock system generation and distribution, Battery charging and USB, Wireless battery charger, Battery fuel gauging, Haptics ERM/LRA, Precision references, Mobile phone hardware, PWB design, Chipset infrastructure and digital interfaces.
1+ year of experience working in a large matrixed organization.
1+ year of work experience in a role requiring interaction with leadership (e.g., Director and above).
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Pay range and Other Compensation & Benefits
$141,300.00 - $211,900.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.
If you would like more information about this role, please contact Qualcomm Careers.
