Study signal integrity and power integrity for evaluation boards and for silicon
What You'll Need
Ability to lead a validation project end to end.
Validation and/or debug experience with high speed electrical or memory interfaces (PCIe, IEEE 100G CK (C2M, CR, KR), and OIF 100G CEI (VSR, MR, LR), 224G, UCIe, etc
Strong understandings of SerDes architecture
Scripting ability with Python or C/C++
Lab and lab equipment experience spanning automating test instruments such as Scope, BERT, Logic Analyzer/Exerciser, VNA, Power Supplies and Multimeters, etc.
Data processing
It Would Be Amazing If You Had
NRZ, PAM4 and theory of operation: PLL, CDR, CTLE, FFE, DFE, etc.
Experience in using compliance software such as SIGTEST, SEASIM, COM, etc.
Experience in PCB design and good understandings of signal integrity, insertion loss, return loss, TDR
Good understanding of design blocks like MAC and PCS is a plus
Experience in optical and die2die validation is a plus
Experience in Mango Database, HTML, JavaScript for data post processing and analysis is a plus
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