Company
QT Technologies Ireland Limited
Job Area
Engineering Group, Engineering Group > ASICS Engineering
General Summary
About the Role
QCTs Digital ASIC Team is actively seeking Front-End Implementation Engineer to work on the creation of top-level timing constraints, physical synthesis, formal verification and functional ECOs to bridge the RTL and physical design worlds at our Cork, Ireland location. You will be part of an established Implementation team that will drive and execute on all phases of the design flow for Snapdragon SoCs at the core and chip-level in 4nm and below technology.
What are we looking for?
Bachelors/Masters in Electronics or Computer Engineering and 5 to 10 years’ experience across the following areas:
Logical/Physical synthesis, DFT implementation, timing closure in STA
Timing constraint capture in TCL for Synopsys tools
Formal verification, Functional/Timing ECO Implementation
Verilog RTL design
UPF, Low power checks
This Position Requires Detailed Knowledge Of
Masters in Electronics or Computer Engineering plus a minimum 5 years of experience
Timing constraint development for large complex SoC devices
TCL script development
TCL/PERL/Python script development for CAD design flows
Physical synthesis
Formal verification, UPF, Low power checks, Static Timing Analysis
Good understanding of Design for test concepts
Where you will be working
- Cork has a proud reputation as Ireland's second largest economic engine and is now one of the Top 20 location choices in Europe with 39,000 people being employed by over 170 overseas companies.
- There's a growing diversity in the region with people from many nationalities relocating to Cork, relishing the opportunity to work and live in a location that offers an excellent quality of life.
- A gateway to Europe, Cork airport provides access to almost 50 international destinations including transatlantic air routes.
Show the full description
Equal Opportunities We are an Equal Opportunity employer; all qualified applicants will receive consideration for employment without regard to race, colour, religion, sexual orientation, gender identity, national origin, disability, veteran status, or any protected classification.
What's on Offer
Apart from working in an open, relaxed and collaborative space, you will enjoy:
Salary, stock and performance related bonus
Maternity/Paternity Leave
Employee stock purchase scheme
Matching pension scheme
Education Assistance
Relocation and immigration support (if needed)
Life, Medical, Income and Travel Insurance
Subsidised memberships for physical and mental well-being
Bicycle purchase scheme
Employee run clubs, including, running, football, chess, badminton + many more
Minimum Qualifications
- Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
- OR
- Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
- OR
- PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.
