The ideal candidate will have hands-on experience in building, validating, and debugging complex SoC/IP designs using emulation platforms and FPGA prototypes.
Key Responsibilities
Develop and maintain FPGA-based prototypes and emulation environments for SoC/IP verification.
Integrate and validate high-speed and low-speed interfaces on emulation/FPGA platforms.
Collaborate with design and verification teams to ensure functional correctness and performance.
Debug hardware/software issues and provide timely solutions.
Optimize emulation flows for faster turnaround and improved coverage.
Required Skills & Experience
5+ years of experience in Emulation and FPGA Prototyping.
Familiarity with high-speed protocols such as
PCIe, UFS, USB, EMAC
Experience in DDR(LP4/LP5/LP6) protocols and memory subsystem integration.
Familiarity with low-speed protocols such as
I2C, SPI, UART, SPMI, RFFE
Experience in AMBA protocols APB/AHB/AXI
Proficiency in RTL design and integration (Verilog/System Verilog).
Hands-on experience with emulation platforms (e.g., Cadence Palladium, Synopsys ZeBu, Mentor Veloce) and FPGA boards.
Good understanding of SoC architecture and verification methodologies.
Strong debugging and problem-solving skills.
Preferred Qualifications
Experience with scripting languages (Python, Perl, TCL) for automation.
Exposure to software bring-up on FPGA/emulation platforms.
Knowledge of hardware/software co-verification.
Education
Bachelor’s or Master’s degree in Electrical/Electronics Engineering or related field.
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