7+ years of working experience in ASIC Design
2+ years of Experience in low power micro-architecture, Design, Power Intent/Implementation, power optimization and power estimation
Experience in silicon bring up and debug is a must
Required experience on SoC micro architecture, multi-domain clocking, AMBA bus protocols such as AHB and APB. AXI is preferred
Experience in ARM IP based full chip debug is preferred
Experience in PCIE/USB peripherals is preferred
Experience in CPU sub system-based design is preferred
Experience in low power design from project start to volume chip production for at least one product cycle is preferred
Minimum Qualifications
- Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
- OR
- Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
- OR
- PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
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Pay range and Other Compensation & Benefits
$190,200.00 - $285,400.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.
If you would like more information about this role, please contact Qualcomm Careers.
