We welcome candidates at various experience levels for this role. Our offers will align with the level during the interview assessment.
What You’ll Do
Analog and mixed-signal modeling: Oversee the development and verification of behavioral models for analog and mixed-signal circuits to support design and system-level simulations
Analog calibration: Collaborate with analog design, digital design, and firmware teams to define and implement calibration algorithms for analog/mixed-signal blocks, optimizing performance and yield
Analog verification: Simulate analog subsystems at higher levels of abstraction to confirm functionality as well as confirm other design characteristics (power, aging performance, EMIR, etc.)
System verification: Work closely with digital verification and firmware engineers to ensure proper interaction between analog, digital, and firmware components including register programming, initialization sequences, power-up calibration, power state changes, and data rate changes
Silicon validation support: Collaborate with silicon validation engineers to support silicon bring-up activities and to correlate pre-silicon models with post-silicon measurements, improving model accuracy and debugging issues
Power Estimation: Collaborate with analog and digital program leads to develop and maintain power models that accurately track power dissipation across data rate, operating conditions, and power states of high-speed SerDes, and then correlate post-silicon measurements with these power model predicted results
Technical mentorship: Guide and mentor engineers in analog behavioral modeling, mixed-signal verification techniques, calibration approaches, and power estimation fostering innovation and technical excellence
What You’ll Need
Strong background in high-speed (106Gbps and higher) SerDes architecture, modelling, and verification
Proficiency in SystemVerilog and behavioural modeling techniques for analog and mixed-signal designs
Knowledge of calibration algorithms, and equalization techniques for SerDes
Previous experience in either high-speed analog / mixed-signal design or modelling, analog/mixed-signal or digital verification, or post-silicon measurements of complex high-speed wireline systems
Strong understanding of analog design fundamentals, including analog-to-digital and digital-to-analog converters, clock generation and clock distribution, analog equalizers, and transmitter drivers, including the numerous mixed-signal calibrations of these analog building blocks.
Experience with EDA tools for schematic entry, and verification.