Timing analysis, validation and debug across multiple PVT conditions using PT/Tempus.
Run Primetime and/or Tempus for STA flow optimization and Spice to STA correlation.
Find out the root cause of timing miscorrelation at different design levels in functional and test mode, propose solutions.
Evaluate multiple timing methodologies/tools on different designs and technology nodes.
Work on automation scripts within STA/PD tools for methodology development.
Good Technical writing and Communication skills, should be willing to work in cross-collaborative environment
Strong experience in design automation using TCL/Perl/Python.
Familiar with digital flow design implementation RTL to GDS : ICC, Innovous , PT/Tempus
Minimum Qualifications
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 4+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
- OR
- Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 3+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
- OR
- PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 2+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
Preferred Qualification/Skills
Strong expertise in STA timing analysis basics, AOCV/POCV concepts, CTS, defining and managing timing constraints, Latch transparency handling, 0-cycle, multi-cycle path handling
Hands-on experience with STA tools - Prime-time, Tempus
Have experience in driving timing convergence at Chip-level and Hard-Macro level
In-depth knowledge cross-talk noise, Signal Integrity, Layout Parasitic Extraction, feed through handling,
Knowledge of ASIC back-end design flows and methods and tools (ICC2, Innovus)
Expert in scripting languages – TCL, Perl, Python
Basic knowledge of device physics
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Pay range and Other Compensation & Benefits
$175,600.00 - $263,400.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.
If you would like more information about this role, please contact Qualcomm Careers.
