Partner with CPU architects to translate architectural requirements into scalable and efficient microarchitectural implementations.
Provide technical direction on microarchitecture, RTL implementation, timing closure, power optimization, verification readiness, and silicon debug.
Drive high-quality design reviews and ensure design decisions are consistent with long-term CPU roadmap objectives.
Make critical technical decisions involving power, performance, area, frequency, schedule, and risk tradeoffs.
Project Execution
Own RTL execution and delivery for one or more CPU projects from concept through silicon.
Drive milestone planning and execution, including architecture reviews, RTL development, verification readiness, design freezes, tapeout preparation, and post-silicon support.
Lead bug triage and resolution efforts, ensuring efficient prioritization of functional, performance, power, timing, and methodology issues.
Evaluate design risks and develop mitigation strategies to maintain project schedules.
Coordinate cross-functional activities among Architecture, RTL, Verification, Physical Design, Power, DFT, CAD, Emulation, Firmware, and Program Management teams.
PPA and Design Quality
Drive achievement of aggressive performance, power, area, frequency, and product goals.
Guide teams through complex design tradeoffs involving pipeline depth, structure sizing, speculation mechanisms, clocking strategies, memory hierarchy, and low-power features.
Review performance analysis, workload data, silicon characterization results, and physical design feedback to identify optimization opportunities.
Champion design quality through methodology improvements, automation, code health, design reviews, and best practices.
Organization and People Leadership
Recruit, retain, mentor, and develop top engineering talent across multiple experience levels.
Establish technical growth plans and career development opportunities for team members.
Foster a culture of accountability, innovation, technical excellence, and collaboration.
Help define team priorities, resource allocation, and organizational strategy to meet evolving business needs.
Build strong partnerships across global engineering teams spanning multiple sites and disciplines.
Silicon and Product Leadership
Support silicon bring-up, performance characterization, power analysis, and post-silicon debug activities.
Drive root-cause analysis and corrective actions for critical product issues.
Participate in long-term CPU roadmap planning and technology strategy discussions.
Minimum Qualifications
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 8+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
- OR
- Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 7+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
- OR
- PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 6+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
Required for this Role
Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or related field.
12+ years of experience in CPU RTL design, microarchitecture, or related semiconductor development.
3+ years of experience leading engineering teams or large technical projects.
Strong understanding of modern high-performance CPU architecture and microarchitecture.
Proven experience delivering complex RTL designs into production silicon.
Preferred Qualifications
MS or PhD degree in Computer Engineering, Electrical Engineering, Computer Science, or related discipline.
Deep expertise in one or more of the following domains
Instruction fetch and branch prediction
Decode and rename
Out-of-order scheduling and execution
Integer and floating-point execution
Vector/SIMD execution
Load-store subsystems
Prefetching and memory hierarchy
MMU and virtualization
Cache and coherency systems
Power management and low-power design
Expert knowledge of SystemVerilog and modern RTL development methodologies.
Strong understanding of timing closure, physical design interactions, power optimization, and silicon implementation.
Experience leading cross-functional execution across Architecture, DV, PD, DFT, CAD, and Product Engineering organizations.
Demonstrated ability to make high-impact technical and business tradeoffs under schedule pressure.
Experience driving methodology, automation, AI-assisted design workflows, and engineering productivity improvements.
Strong communication and leadership skills with the ability to influence across organizations and executive leadership levels.
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Pay range and Other Compensation & Benefits
$228,400.00 - $342,600.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.
If you would like more information about this role, please contact Qualcomm Careers.
