Minimum Qualifications
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 8+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
- OR
- Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 7+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
- OR
- PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 6+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
Preferred Qualifications
Over 10 years of experience in a combination of power estimation, modeling and optimization of CPU and/or SoCs, and at least 5 years of experience with a high-performance server chip
Strong expertise in power management of a high-performance system including management of active power, idle low power and silicon/system limits
Strong fundamentals in digital ASIC design and power of CMOS circuits
Strong technical documentation skills, along with excellent written and verbal communication abilities.
Master's in Computer Science/Engineering, Electrical Engineering, or related field with 15 years of experience in low power design and optimization.
Experience in design and/or analysis of low power features at SoC, chipset and platform level
Experience in hardware and software co-design of optimizations for low power features
Experience in power delivery systems including multi-phase bucks and LDOs
Experience in modeling peak current transients of the various IPs in the system
Strong understanding of silicon test methodologies for power and thermal optimization
Proven track record in hyperscale data center solutions
Familiarity with high performance and low power design techniques
Key Responsibilities
Develop end-to-end power modeling framework to support server use cases.
Perform tradeoff analysis for various workloads / usecases.
Identify gaps relative to targets and propose feature enhancements to meet product KPIs.
Collaborate with IP, SoC and Platform power and thermal engineers to optimize KPIs of the system
Must have good communication skills and able to work in dynamic environment with top level engineers and technologists
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Pay range and Other Compensation & Benefits
$209,300.00 - $313,900.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.
If you would like more information about this role, please contact Qualcomm Careers.
