Qualcomm
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Qualcomm China
Engineering Group, Engineering Group > ASICS Engineering
Deep expertise in ASIC development, especially switch verification using System Verilog / UVM, SVA and Coverage-driven methodology, Emulation / FPGA validation
Forwarding pipelines (L2/L3, ACLs, tunneling)
Traffic management (QoS, scheduling, shaping)
Strong leadership and cross-functional influence capability
Strong debugging and system-level problem-solving skills
Excellent teamwork, interpersonal and communication skills.
Fluent in Chinese and English both verbal and written.
Ability to work in stressful situations with tight schedules to meet.
Description of Function & Responsibility
Define verification architecture for Packet Forwarding switch ASICs from Module level, Subsystem level to System level
Drive cross-functional alignment with HW, SW, and Product teams on networking features and performance verification
Drive schedule alignment and ensure on-schedule execution with Arch and Design Team
Mentor senior technical leaders and influence organization-wide engineering direction
MS in EE.
15 to 20+ years ASIC design/verification experience. Experience in merchant silicon or Packet Forwarding ASIC is highly desirable.
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If you would like more information about this role, please contact Qualcomm Careers.
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