This is a challenging position with a lot of inter-team communication. You will be working on the most innovative technologies, surrounded by experts and users of our technology from various teams (SoC Architecture, HW and SW Design, Verification, Debug, Post Silicon) worldwide.
Responsibilities
In your role, you will
Collaborate regularly with highly skilled experts across different teams (Architecture, Hardware, Software, Verification, Emulation, etc.) to ensure our Verification technology is used efficiently in Qualcomm SoCs.
Contribute to the definition and enhancement of the NoC Verification environment and its configuration in the various SoCs.
Be responsible for the technical support of new NoC verification solutions.
Help resolve NoC testbench or DUT simulation issues.
Participate in defining new Verification solutions and improvements for our technology.
Develop in-depth technical material and organize training sessions for different teams worldwide.
The working environment will consist of: Verilog, SystemVerilog, UVM, Python, Linux, Shell, Git, Synopsys, or Mentor Graphics verification tools.
Skills/Experience
Strong analytical skills for debugging in simulation , emulation, or silicon bring-up environments.
Understanding of interconnect protocols like AHB/AXI/ACE/ACE-Lite/CHI/NoC concepts.
Understanding of overall SoC development flow: SoC architecture, RTL design and verification, SoC performance and DDR memory channel, physical implementation, silicon debug.
Good knowledge of system-level features such as memory-mapping, MMUs, Quality of Service, cache infrastructure, security schemes, etc.
Ability to quickly react and adapt to changes.
Excellent communication skills.
Minimum Qualifications
Master’s degree in Microelectronics, Computer Science, or a related field.
Standard SoC knowledge: Multimedia IPs, GPU, multi-core CPU architecture, Processors, Caches, memory controllers, interconnects, and related design, integration, and verification challenges.
5 years of solid experience in verification and/or design for SoC/ASIC engineering development cycles.
Language proficiency (CEFR minimum grade): English (B2); French (B2)
Preferred Qualifications
Experience in using or designing UVM components, benches, or VIPs.
What's on Offer
Friendly and collaborative working environment.
Salary, stock, and performance-related bonus.
Maternity/Paternity Leave.
Employee stock purchase scheme.
Matching pension scheme.
Education Assistance.
Life, Medical, Income, and Travel Insurance.
Keywords
SoC, ASIC, Verification, Simulation debug, Interconnect, Cache, CPU, GPU, Coherency, Debug
Minimum Qualifications
Bachelor's degree in Science, Engineering, or related field.
References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.
Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).
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If you would like more information about this role, please contact Qualcomm Careers.
