Drive structured root-cause analysis (RCA) and validate failure mechanisms through correlation of electrical, process, design, packaging, and assembly data.
Analyze memory diagnostics data, including SRAM and stacked-DRAM bitmap analysis, to accelerate yield learning and failure localization.
Develop analytics frameworks, dashboards, and yield-monitoring methodologies to improve product and manufacturing visibility.
Apply statistical modeling, machine learning, and AI techniques to accelerate diagnostics, identify yield risks, and improve predictive yield learning.
Collaborate with cross-functional teams and external partners to implement corrective actions and drive continuous yield improvement.
Support New Product Introduction (NPI) and high-volume manufacturing (HVM) by identifying yield risks and establishing robust monitoring strategies.
Qualifications
Bachelor's degree in Engineering or related field with 6+ years of relevant experience, OR Master's degree with 5+ years, OR Ph.D. with 4+ years.
Strong experience in semiconductor yield analytics, diagnostics, and manufacturing data analysis.
Proven track record of driving yield improvement in high-volume manufacturing environments.
Experience analyzing large-scale semiconductor datasets and developing data-driven solutions for complex yield challenges.
Strong understanding of semiconductor test methodologies, failure analysis, and yield learning processes.
Proficiency with analytical tools such as Python, JMP, SQL, Yield Explorer, Power BI, or equivalent platforms.
Strong statistical analysis, problem-solving, and technical leadership skills.
Excellent communication and cross-functional collaboration abilities.
Preferred Qualifications
Deep understanding of 2.5D/3DIC architectures, chiplet integration, TSV/interposer technologies, hybrid bonding, and advanced packaging flows.
Experience building and scaling yield analytics frameworks, diagnostics methodologies, and data infrastructure.
Familiarity with process correlation, defect characterization, and failure-mechanism modeling.
Experience working with advanced packaging, assembly, OSAT, and foundry manufacturing environments.
Hands-on experience applying AI/ML techniques to semiconductor yield analytics and diagnostics.
Experience with DRAM, HBM, and stacked-memory diagnostics.
Knowledge of package reliability, failure analysis, and heterogeneous integration challenges.
Demonstrated technical leadership and ability to drive cross-functional yield improvement initiatives.
Why Join Us
This role offers the opportunity to directly influence the yield, quality, and manufacturability of Qualcomm's most advanced 3DIC and heterogeneous integration products. The successful candidate will play a critical role in developing next-generation yield analytics and diagnostics capabilities that accelerate technology learning and enable successful deployment of future chiplet-based and 3D integrated solutions.
Minimum Qualifications
- Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
- OR
- Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
- OR
- PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
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