onsemi
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JG11 – Senior Development Reliability Engineer
Manage reliability qualification and risk assessments for new discrete and power module semiconductor devices.
Define, review, and execute change‑driven reliability qualification plans to support continuous improvement initiatives.
Provide technical reliability risk assessments for product design and manufacturing changes, quality excursions, and customer‑reported issues.
Support change management review boards by supplying reliability data, analysis, and technical recommendations for approval decisions.
Drive structured problem solving for qualification failures.
Serve as a key reliability interface to support customer audits, reliability reviews, and technical inquiries.
Collaborate closely with global Manufacturing, Quality, Product Engineering, and Suppliers to ensure robust, compliant, and timely changeimplementation.
Job Requirements
Bachelor’s degree or Master’s degree in Electronics, Materials Science/Engineering, Physics, Chemical Engineering, or related technicaldisciplines.
3–5 years of experience in Reliability Engineering, Process Engineering, Product Qualification, or Reliability Laboratory operations.
Strong knowledge of environmental stress testing and associated failure mechanisms for discrete and module power semiconductors.
Hands‑on experience with reliability qualification, data analysis, and industry standards (AEC, JEDEC, MIL).
Good understanding of wafer fabrication, semiconductor assembly and test flows. Experience with SiC a plus.
Ability to exercise independent technical judgment for change risk assessments and qualification readiness.
Strong analytical, structured problem‑solving, and communication skills, with the ability to interface effectively with customers and auditors.
Experience with 8D methodology, including leading cross‑functional teams through the 8D process; Lean Six Sigma Green/Black Belt is preferred.
Familiarity with FMEA, statistical analysis, control plans, and related quality tools is an advantage.
<10% travel may be required.
JG11 – Senior Development Reliability Engineer
Manage reliability qualification and risk assessments for new discrete and power module semiconductor devices.
Define, review, and execute change‑driven reliability qualification plans to support continuous improvement initiatives.
Provide technical reliability risk assessments for product design and manufacturing changes, quality excursions, and customer‑reported issues.
Support change management review boards by supplying reliability data, analysis, and technical recommendations for approval decisions.
Drive structured problem solving for qualification failures.
Serve as a key reliability interface to support customer audits, reliability reviews, and technical inquiries.
Collaborate closely with global Manufacturing, Quality, Product Engineering, and Suppliers to ensure robust, compliant, and timely changeimplementation.
Job Requirements
Bachelor’s degree or Master’s degree in Electronics, Materials Science/Engineering, Physics, Chemical Engineering, or related technicaldisciplines.
3–5 years of experience in Reliability Engineering, Process Engineering, Product Qualification, or Reliability Laboratory operations.
Strong knowledge of environmental stress testing and associated failure mechanisms for discrete and module power semiconductors.
Hands‑on experience with reliability qualification, data analysis, and industry standards (AEC, JEDEC, MIL).
Good understanding of wafer fabrication, semiconductor assembly and test flows. Experience with SiC a plus.
Ability to exercise independent technical judgment for change risk assessments and qualification readiness.
Strong analytical, structured problem‑solving, and communication skills, with the ability to interface effectively with customers and auditors.
Experience with 8D methodology, including leading cross‑functional teams through the 8D process; Lean Six Sigma Green/Black Belt is preferred.
Familiarity with FMEA, statistical analysis, control plans, and related quality tools is an advantage.
<10% travel may be required.
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