What You’ll Do
Contribute to the design and optimization of digital architectures for low-power SoCs
Develop and implement RTL modules using SystemVerilog/Verilog
Perform functional simulation, verification, and debugging of digital designs
Participate in integration of digital subsystems within a larger SoC environment
Support FPGA-based prototyping and validation of digital designs
Collaborate with cross-functional teams including verification, physical design, and system architects
What You’ll Need
Currently enrolled in a Master’s program in Electrical Engineering or a related field
Knowledge in digital IC design and computer architecture
Experience with HDL languages (Verilog/SystemVerilog/VHDL) for RTL design
Understanding of topics such as pipelining, memory hierarchies, low-power design, and digital system integration
Familiarity with simulation and verification methodologies
Basic knowledge of FPGA prototyping flows is a plus
Good communication skills (English)
Strong team player with a collaborative mindset
Eligibility to work in Switzerland
What Else You May Bring
Experience with microcontroller programming
Knowledgeable with the Linux shell environment
What You Need to Submit for This Application
CV (required)
Transcript of records (Master’s transcript is required)
Motivation Letter (recommended)