Optimize memory portfolio through focused reuse, lifecycle management, and promoting consistency across technology and business needs.
Track industry trends and convert them into strategic actions to inform roadmap and investment decisions.
Oversee memory IP development from architecture through production release, ensuring high quality and competitive PPA, and meeting standards for schedule, reliability, testability, and manufacturability.
Lead and build a high-performing global memory development team; define organizational structure, elastic resourcing model, and succession plan.
Empower team and foster accountability, excellence, collaboration, and continuous improvement.
Promote trust, clarity, and results as a strategic thinker with strong technical and communication skills.
Act as liaison and point of contact between the memory development team and stakeholders. Communicate strategy, progress, and risks to leadership
#LI-RG1
Qualification Required
Bachelor’s degree in Electrical Engineering or related field (Master’s degree preferred).
15+ years of experience in semiconductor memory development, with deep expertise in embedded NVM technologies (EEPROM, OTP, Flash, RRAM, MRAM).
Demonstrated understanding of SRAM architectures and compiler‑based memory solutions.
Proven leadership experience managing managers or senior technical leaders.
Track record of defining and delivering memory IP strategies that balance innovation, execution, and business needs.
Strong cross‑functional leadership experience across design, technology, test, and product organizations.
Excellent communication and presentation skills, with the ability to influence at senior leadership levels.
Preferred
5+ years of experience leading a memory development team
Experience with RRAM development
Experience delivering memory IP for automotive or safety‑critical applications.
Experience leading globally distributed engineering organizations.
#LI-RG1