As part of the Corporate R&D Design systems technology department we are responsible for the evaluation, acquisition, development, integration and support of design tools and methodologies towards the world wide BU development teams. We are looking for a digital RTL2GDS and/or verification specialist that can strengthen our abilities in the digital design space.
Influence EDA vendors’ developments on the features, performance and quality of their digital design tools.
Establish new tools and methodologies increasing the quality of ON Semiconductor’s products
Continuously make proposition to improve EDA tools environment and methodologies in order to improve designer productivity and satisfaction level.
Support the world wide digital design community in using external EDA tools and internally developed scripts.
MS Electrical Engineering, Computer Science or related field, or BS with experience.
2-5 years of expertise on Place and Route tools is a must (Fusion Compiler).
Preferably on multi-million gate designs in small node technologies (16nm and smaller) and using Low power design techniques (UPF)
Experience with complete digital design flow and design tools (Synthesis, Static Timing Analysis, DFT, Logic Equivalence Checking, ATPG, Place and Route …) from EDA vendors such as Cadence, Mentor, Synopsys …
Experience with Linux as a user environment
Affinity with programming & scripting languages such as Perl, TCL, Python, QT, C, C++, makefiles …
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Having experience with revision controlled development environments (SVN, Cliosoft) is a plus.
A team player with excellent communication skills – verbal and written
Fluent in English.
