Build reusable bus functional models, monitors, checkers and scoreboards following coverage driven verification methodology.
Expected to understand the design specification and implementation, define the verification scope, develop test plans, tests, and the verification infrastructure and verify the correctness of the design.
You will be collaborating with architects, designers, and pre and post silicon verification teams to accomplish your tasks.
What we need to see
B.Tech./ M.Tech. with 2+ years of relevant experience
Experience in verification at Unit/Sub-system/SOC level using Verilog and SystemVerilog
Background with verification of IP or interconnect protocols (e.g. PCI Express, USB, SATA)
Experience in developing and working in functional coverage based constrained random verification environments
Experience in DV methodologies like UVM/VMM and exposure to industry standard verification tools for simulation and debug
Ways to stand out from the crowd
Excellent problem solving skills
Knowledge of PCIE protocol - Gen3 and above
Proficiency in Testbench development using SystemVerilog
Perl, Python or similar scripting and SW programming language experience
Good debugging and analytical skills
Good interpersonal skills & dream to work as a great teammate
With competitive salaries and a generous benefits package, Nvidia is widely considered to be one of the most desirable employers in the world. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you.
We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.
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