Design and implement reusable, scalable testbenches and testbench components using System Verilog and UVM.
Collaborate with architects, RTL designers, and software engineers to drive feature completeness, performance visibility, and verification closure.
What we need to see
M.Tech. (or equivalent) in VLSI or Electronics Engineering OR B.Tech with 2+ years of experience in a similar domain
Hands-on experience in unit and/or system level verification
Ability to contribute to testbench development and maintenance, preferably using System Verilog and standard methodologies
Proficiency in Python or industry-standard scripting languages for automation and test development
Proven debugging fundamentals — ability to read waveforms, analyze logs, and isolate issues effectively
Familiarity with industry-standard tools such as VCS, Xcelium, Verdi, or similar simulation/debug environments
Good understanding of RTL design concepts and experience working with Verilog or SystemVerilog
Experience with UVM (Universal Verification Methodology) is a strong plus
Clear communication skills and collaborative attitude, with ability to work alongside design, DV, and automation teams
Widely considered to be one of the technology world’s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. Also, e have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our outstanding engineering teams are growing fast. If you are creative, curious, and motivated with a real passion for technology, we want to hear from you!
#LI-Hybrid