Drive pre-silicon test readiness, ensuring DFX features, test patterns and ATE test programs are ready ahead of tapeout and silicon arrival
Lead post-silicon DFX bring-up execution, coordinating SCAN, MBIST, IO and other test content debug across DFX, validation and test engineering teams
Track and drive productization milestones partnering with Operations, including ATE test time reduction, test coverage, yield learning and DPPM/quality targets required for qualification and production release
Coordinate handoffs to Operations and support production ramp readiness, including system-level and datacenter test needs
Run regular program execution reviews, capture decisions, actions and owners, manage scope changes, and drive items to closure
Proactively identify schedule and quality risks, partner with engineering on mitigation plans, and provide clear, data-driven status and recommendations to leadership for trade-off decisions
Assemble lessons learned and apply standard methodologies from one program to another to continuously improve DFX execution
What we need to see
BS (Masters preferred) in Electrical Engineering, Computer Engineering or a related field or equivalent experience
6+ years of experience in semiconductor technical program management, test engineering, DFX or post-silicon validation
Hands-on knowledge of the ASIC/SoC development flow, with working familiarity with DFX concepts (SCAN, ATPG, MBIST, JTAG) and post-silicon bring-up, test and productization
Demonstrated ability to drive execution with multi-functional teams and concurrent programs while keeping sophisticated schedules on track
Understands and deals well with rapid development cycles and constant change; remains flexible and calm in the face of uncertainty
Self-motivated and proactive with strong attention to detail and demonstrated critical thinking capabilities
Proficient with program management tools and data (e.g., Jira, Smartsheet, Confluence); scripting experience in Python is a plus
Ways to stand out from the crowd
Experience with ATE platforms and production test flows
Exposure to datacenter testability challenges, including system-level and in-field test.
Experience with yield analysis and manufacturing quality metrics.
Our technology has no boundaries! NVIDIA is building the world’s most groundbreaking and innovative compute platforms for the world to use. It’s because of our work that scientists, researchers and engineers can advance their ideas. At its core, our visual computing technology not only enables an outstanding computing experience, but it is also energy efficient! We pioneered a supercharged form of computing loved by the most fast paced computer users in the world - scientists, designers, artists, and gamers.
NVIDIA offers highly competitive salaries and a comprehensive benefits package. We have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our world-class engineering teams are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to hear from you!
#LI-Hybrid
- Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary ranges for this position are:
- 168,000 USD – 258,750 USD for Level 4; and 200,000 USD – 322,000 USD for Level 5.
You will also be eligible for equity and benefits.
Applications for this job will be accepted at least until November 3, 2026.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
