Design experiments, execute test plans, and build models that isolate circuit-level bottlenecks。
Lead multi-functional root-cause closure across architecture, design, validation, software/firmware, power and thermal, reliability, ATE, product management, manufacturing, and operations, own fixes through confirmation.
Analyze production-silicon data across PVT corners and binning populations to quantify guardbands, yield trade-offs, and circuit optimization opportunities that feed directly into product definition and future architecture decisions.
Establish reusable automation, data analysis pipelines, and visualization tools that improve characterization coverage, execution efficiency, and debug velocity across simultaneous product.
What we need to see
BS or MS degree in Electrical Engineering, Computer Engineering, or equivalent experience.
8+ years of hands-on experience in post-silicon circuit characterization, silicon bring-up, or circuit validation on complex SoC or GPU products.
Deep understanding of analog, digital, and mixed-signal circuit behavior — including SRAM, PLL, clock networks, voltage regulators, I/O circuits, and on-die sensors.
Hands-on lab proficiency with oscilloscopes, spectrum analyzers, DAQ systems, source meters, high-speed probing, and tester-to-system correlation workflows.
Strong background in power supply and substrate noise analysis — chip- and board-level dI/dt characterization, PDN impedance, droop measurement, and mitigation techniques.
Proficiency in Python and scripting for automation, data analysis, and tool development; familiarity with C/C++ is a plus.
Excellent problem-solving skills and a collaborative mindset — demonstrated ability to drive alignment across multi-site, cross-functional teams including offshore engineering organizations.
Ways to stand out from the crowd
Experience characterizing circuits at advanced process nodes on large-scale GPU or datacenter SoC products.
Background in on-die noise measurement methodology — NMEAS, worst-case noise test development, noise watermarking, or Bayesian/ML-driven characterization optimization.
Familiar with product binning methods, frequency-voltage optimization, guardband analysis, and statistical techniques for characterization data at scale.
Experience with pre-silicon circuit simulation tools (SPICE, timing analysis) and silicon-to-simulation correlation workflows that close the loop between design and characterization.
Explore creative ways to integrate AI insights into continuous improvement analysis, debug, workflow, utilize AI-driven method for silicon circuit optimization.
NVIDIA is the world leader in accelerated computing, powering AI, gaming, robotics, autonomous systems, and scientific discovery. We invest in our people with competitive benefits, continuous learning, and a team where everyone can do their best work.
NVIDIA is committed to fostering a diverse work environment and is proud to be an equal opportunity employer. We do not discriminate on the basis of race, color, national origin, gender, gender identity, sexual orientation, religion, age, marital status, veteran status, disability, or any other legally protected status.
