Roles & Responsibility
Responsible for staffing and workload forecast; employee inclusion, engagement, mentoring and career development; employee training and identification and training of skills required to execute on programs. The responsibilities include the recruiting, sourcing, onboarding, performance management and contract maintenance for the contractors working in the business area.
Maintain positive relationships with internal and external stakeholders.
Build diverse and inclusive teams with high levels of engagement, including mentoring and coaching.
Leverage a portfolio with combined interpersonal, business and technical capabilities.
Collaborate with Digital Management peers across the Digital Technologies Department.
Operate in a team environment and collaborate across the business sector with varying levels of leadership to set and exceed program goals
Champion change within the organization, to achieve competitive advantage for the business.
Basic Qualifications
Bachelor’s degree in Computer Engineering (BSCE), Electrical Engineering (BSEE) or related STEM Degree with 8 years of related experience or a Master’s degree with 6 years of related experience or a PhD with 4 years of related experience.
U.S Citizenship is required.
Must be able to obtain DoD Secret Clearance. Secret Clearance is required to start. Must be able to obtain Special Program Access (SAP). An Active Secret Clearance and Special Program Access (SAP) are required for continued employment.
Experience leading/managing FPGA, ASIC, SoC, and/or digital subsystem design projects.
Knowledge of current digital technologies (FPGA, ASIC, SoC, verification, and/or subsystem).
Preferred Qualifications
Master’s degree in Computer Engineering (MSCE), Electrical Engineering (MSEE) or related STEM Degree.
Active DoD Secret or Top Secret clearance.
Experience leading teams in a multi-disciplined engineering environment.
Demonstrated proficiency in mentoring and the ability to build highly engaged teams.
Excellent verbal and written communication skills and the ability to present knowledge to a wide variety of audiences of different backgrounds effectively.
7 years experience in all areas of the Digital, ASIC, or FPGA Design process, from requirements analysis through verification testing.
4 years experience with designing, leading and managing ASIC or FPGA design projects.
Primary Level Salary Range: $153,800.00 - $230,800.00
The above salary range represents a general guideline; however, Northrop Grumman considers a number of factors when determining base salary offers such as the scope and responsibilities of the position and the candidate's experience, education, skills and current market conditions.
Depending on the position, employees may be eligible for overtime, shift differential, and a discretionary bonus in addition to base pay. Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results. Employees in Vice President or Director positions may be eligible for Long Term Incentives. In addition, Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business.
The application period for the job is estimated to be 20 days from the job posting date. However, this timeline may be shortened or extended depending on business needs and the availability of qualified candidates.
Northrop Grumman is an Equal Opportunity Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO and pay transparency statement, please visit http://www.northropgrumman.com/EEO. U.S. Citizenship is required for all positions with a government clearance and certain other restricted positions.
