Interact with process area, process integration, yield, failure analysis, product engineering, design, and layout teams to drive clear definition of yield, cell, CMOS, qual, and reliability issues and pareto and derive improvement actions needed across tech-nodes and designs
Own and drive non-standard deep dive statistical analysis of inline, probe, cell, and other critical metrics to define issues/problems, enable early inline detection, and improve the product yield and quality. Quantify and track progress on the issue hit hate, line impact, gap to program goal. Quantify yield improvement/downside seen based on process/probe changes
Initiate data mining and correlation study on new issue seen. Initiate PFA request to identify root cause of yield issue. Perform inline correlation study to establish inline prediction to yield issue. Make yield projections based on expected improvement/downside. Conduct yield trend analysis, identify root causes in process step, conversion, algorithm change, and design, for yield shift
Continuously develop/re-define inline detection in collaboration with metrology and RDA team
Identify and define gaps with current test and co-develop (with product, probe, param engineering) unique parametric/probe bins to detect new fail modes as well as validate new program release
Collaborate with module owners to identify, quantify key module deficiencies/technology gaps, and drive cross-functional teams to address. Optimize existing layout, conceptualize, and develop innovative solutions to meet product requirements and manufacturability
Develop and innovate techniques in extracting data from different databases through various query languages and automate through scripting to improve work efficiency
Assist and support the transfer documentation of layout/architecture fundamentals of new technology from R&D to manufacturing fab.
Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exercising sound judgment and complying with organizational standards and legal requirements.
Contributes to a culture of continuous improvement by identifying, testing, and sharing AI-enabled enhancements within one’s scope of work.
Requirement
A Bachelor Degree or Masters in Electrical and Electronics Engineering, Material Science
5 - 7 years of experience within FA, Yield analysis or Yield Enhancement
Discover yield issues in NAND development and identify unique metric or combination of metrics, such as wafer/dice/tile shading, ECATS or other custom metric for issues quantification
Deep understanding of probe failure mechanism, ability to do electrical bench data collection is desirable
Fluency in Python, JavaScript, C or C++
About Micron Technology, Inc.
We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all. With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience.
To learn more, please visit micron.com/careers
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.
To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_sg@micron.com
Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.
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