Take first silicon and boards from power-on to a working link. Set up the bench, verify rail voltages and sequencing, check clocks and resets, establish register access, and debug the electrical and optical interfaces alongside firmware and photonics engineers.
Measure performance against a defined specification. Set pass/fail limits for metrics such as rail ripple, module power, bit error rate (BER), and link margin. Run tests across relevant voltage, temperature, and operating conditions, then document margin to spec and where it breaks down.
Close the loop on hardware failures. Reproduce intermittent issues, isolate the cause across hardware, firmware, and optics, and verify the fix with before-and-after measurements on updated hardware or firmware.
Move the design into manufacturing. Support pilot builds, correlate bench and production-test results, and hand off validated test procedures, debug instructions, and design documentation to NPI and manufacturing teams.
What We're Looking For
Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field with 3–5 years of relevant hardware engineering experience, or a master’s degree or PhD in a related field with 2–3 years of relevant experience. Equivalent professional experience in lieu of a degree is welcome.
Hands-on ownership of at least one PCB or electrical subsystem through schematic capture or layout review, first power-on, and bench validation. Experience with Cadence OrCAD, Allegro, or comparable ECAD tools.
Experience personally measuring at least two board-level parameters, such as rail ripple, power-sequencing timing, clock frequency or jitter, or current draw. Comfortable setting up and using oscilloscopes, programmable power supplies, multimeters, and logic analyzers as appropriate.
Experience debugging at least one board-level control interface, such as I²C, SPI, or UART, using bus captures, register reads, or firmware logs to isolate a fault.
At least one example of taking a hardware issue from symptom to verified fix. Be prepared to explain your bench setup, the original measurement, the change you made, and the measured result against a target. Examples include reducing ripple below its specified limit, restoring link margin, resolving a sequencing violation, or improving repeatability across test runs.
Preferred Qualifications
Hands-on bring-up or validation of optical transceivers or high-speed hardware with serial lanes operating at 25 Gb/s or faster. Experience with eye measurements, BER testing, or 100G- or 200G-per-lane PAM4 is a plus.
Python or similar scripting experience for instrument control, register access, or automated test and data collection. Familiarity with CMIS or optical module management is valuable.
Experience applying signal and power integrity principles to PCB design, debugging thermal or EMI/EMC issues, or supporting optical Ethernet and data center interconnect platforms
- Expected Base Pay Range (USD)
- 108,220 - 162,100, $ per annum
The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

This role is eligible to participate in Marvell's bonus and equity plans, including a new hire equity grant and annual equity refreshers, ensuring you are rewarded for your contributions and remain invested in the company's long-term success.
 Additional Compensation and Benefit Elements Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.
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