What You Can Expect
Design and implement low-level diagnostic software, test suites, and APIs to exercise and validate network switch hardware components
Develop test plans to verify ASICs, high-speed SerDes, memory interfaces (DDR/HBM), PCIe buses, power management, and thermal control systems
Partner with hardware design and silicon teams during initial board bring-up, debugging early prototype hardware and isolating root-cause issues
Deliver robust diagnostic test coverage for integration into factory manufacturing lines to ensure high-quality production standards
Build automated testing frameworks and scripts to execute diagnostic software, collect metrics, and analyze failure data
Work closely with Hardware Engineering, ASIC Design, Embedded Firmware, and Network OS teams to define diagnostic requirements and hardware-testability (DFT) hooks
Mentor junior engineers in developing their diagnostic software and hardware debug skills, and provide technical guidance
Proactively identify hardware-testability and production-readiness risks across the platform stack, develop mitigation strategies, and escalate issues as needed to drive resolution
What We're Looking For
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field and 10-15 years of related professional experience; Master's degree in a related technical field with 5-10 years of experience
Proficient in C/C++ for embedded or low-level software development, along with strong scripting skills in Python or Bash for automation
Solid understanding of switch architecture, high-speed signal integrity, SerDes, I2C/SPI/MDIO protocols, PCIe, and peripheral management
Experience developing in Linux environments, including knowledge of Linux drivers, kernel concepts, and memory mapping
Hands-on experience using lab equipment such as oscilloscopes, logic analyzers, and JTAG debuggers to isolate hardware vs. software bugs
Experience with networking ASICs or switch silicon from vendors like Broadcom, Marvell, or Intel (Barefoot) is a plus
Familiarity with networking protocols (Ethernet, TCP/IP, Layer 2/3 switching) and optical transceivers
Knowledge of U-Boot, Open Network Install Environment (ONIE)
Exposure to rack-scale management: BMC (OpenBMC), PDU, IPMI, or Redfish
Experience with continuous integration (CI/CD) pipelines and automated test infrastructure
Proven experience managing test relationships with ODM/JDM or CM partners
Strong analytical, problem-solving, and debug skills, with an inherent sense of urgency and accountability
- Expected Base Pay Range (USD)
- 150,680 - 225,700, $ per annum
The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

This role is eligible to participate in Marvell's bonus and equity plans, including a new hire equity grant and annual equity refreshers, ensuring you are rewarded for your contributions and remain invested in the company's long-term success.
 Additional Compensation and Benefit Elements Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.
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