What You Can Expect
In this (hybrid/remote/in-office) role in LOCATION, you’ll work day to day with an RTL engineer to verify their design. Their design is in Verilog; you’ll use System Verilog to debug. You’ll run simulations using Synopsys VCS or a similar program, and then debug as needed until the design meets required specifications. You’ll also work closely with DFT engineers who are working in parallel on your blocks.
You’ll attend weekly staff meetings to go over what everyone is working on and update your progress or address any issues. As you take responsibility for larger blocks, you may have to present to a review committee and explain your test plan and test schedule for those larger blocks.
What We're Looking For
To be successful in this role you must
Have completed a Bachelor’s Degree in Electrical Engineering or Computer Engineering and have 2 to 3 years of related professional experience OR a Master’s Degree and/or PhD in those fields.
Your coursework must have included some analog classes, Verilog or VHDL, basic circuits, and computer architecture. You should have a focus in VLSI or show projects in your courses that directly relate to chip design.
You have used a tool like Synopsys, Cadence, or Mentor to run simulations and you can write and debug a testbench.
Be comfortable working in a Linux environment and doing scripting with Python.
Be extremely detail-oriented and ready to iterate a design over and over again until it is refined completely.
- Work and communicate well with your team, keeping them in the loop about your progress, issues you encounter, and any deviations from the planned schedule.
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- Additional Compensation and Benefit Elements
With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.
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