Responsibilities
Key Responsibilities
Validate new PowerArtist features, enhancements, and bug fixes across diverse design environments and customer use cases.
Develop and maintain feature validation test plans, design suites.
Perform functional, performance, and quality verification of RTL power analysis flows.
Reproduce, analyze, and debug customer-reported issues in collaboration with R&D and AE teams.
Create testcases to verify bug fixes and ensure no regressions are introduced.
Validate support for new technologies, libraries, simulators, synthesis tools, and waveform formats.
Analyze RTL power estimation results and verify accuracy against expected behavior.
Automate validation workflows, regression execution, and result analysis using scripting.
Provide backend technical support to AE teams by investigating complex customer issues and identifying root causes.
Collaborate closely with R&D during feature development cycles to improve product quality and usability.
Support release qualification activities and ensure timely delivery of high-quality product releases.
Qualifications
Required Skills
3+ years of experience in RTL design, verification, power analysis, or EDA tool validation.
Strong understanding of RTL (Verilog/SystemVerilog) and digital design fundamentals.
Familiarity with AI/ML and Generative AI technologies, including their application in EDA workflows, validation automation, regression analysis, testcase generation, and productivity enhancement.
Hands-on experience with PowerArtist or RTL power estimation and analysis methodologies.
Knowledge of switching activity formats (VCD, FSDB, SAIF) and power modeling concepts.
Familiarity with dynamic power, clock power, and activity-based power estimation techniques.
Experience debugging RTL power analysis flows, libraries, constraints, and waveform-related issues.
Knowledge of synthesis tools (Design Compiler, Genus) and simulation environments (VCS, Xcelium, Questa).
Strong debugging, root-cause analysis, and log investigation skills.
Proficiency in TCL, Shell, and/or Python scripting for automation and regression development.
Ability to work effectively with R&D and AE teams in diagnosing and resolving complex technical issues.
Strong written and verbal communication skills with an emphasis on technical documentation.
Careers Privacy Statement***Keysight is an Equal Opportunity Employer.***
Key Responsibilities
Validate new PowerArtist features, enhancements, and bug fixes across diverse design environments and customer use cases.
Develop and maintain feature validation test plans, design suites.
Perform functional, performance, and quality verification of RTL power analysis flows.
Reproduce, analyze, and debug customer-reported issues in collaboration with R&D and AE teams.
Create testcases to verify bug fixes and ensure no regressions are introduced.
Validate support for new technologies, libraries, simulators, synthesis tools, and waveform formats.
Analyze RTL power estimation results and verify accuracy against expected behavior.
Automate validation workflows, regression execution, and result analysis using scripting.
Provide backend technical support to AE teams by investigating complex customer issues and identifying root causes.
Collaborate closely with R&D during feature development cycles to improve product quality and usability.
Support release qualification activities and ensure timely delivery of high-quality product releases.
Required Skills
3+ years of experience in RTL design, verification, power analysis, or EDA tool validation.
Strong understanding of RTL (Verilog/SystemVerilog) and digital design fundamentals.
Familiarity with AI/ML and Generative AI technologies, including their application in EDA workflows, validation automation, regression analysis, testcase generation, and productivity enhancement.
Hands-on experience with PowerArtist or RTL power estimation and analysis methodologies.
Knowledge of switching activity formats (VCD, FSDB, SAIF) and power modeling concepts.
Familiarity with dynamic power, clock power, and activity-based power estimation techniques.
Experience debugging RTL power analysis flows, libraries, constraints, and waveform-related issues.
Knowledge of synthesis tools (Design Compiler, Genus) and simulation environments (VCS, Xcelium, Questa).
Strong debugging, root-cause analysis, and log investigation skills.
Proficiency in TCL, Shell, and/or Python scripting for automation and regression development.
Ability to work effectively with R&D and AE teams in diagnosing and resolving complex technical issues.
Strong written and verbal communication skills with an emphasis on technical documentation.
Careers Privacy Statement***Keysight is an Equal Opportunity Employer.***
