As part of our fast-paced silicon group, you will become an expert in building high-speed ASICs, from specifications to final netlist. We give you opportunities to work on complex modules and subsystems where you can challenge yourself and grow.
Open communications, empowerment, innovation, teamwork, and customer success are the foundations of team culture. Thus, you set your own limits for learning, achievements, and rewards.
Position Summary
We are seeking a highly motivated Senior ASIC Verification Engineer to join our networking silicon development team.
Key Responsibilities
Own and drive block-level or subsystem verification efforts, from creating test plans to achieving comprehensive coverage closure.
Develop, enhance, and maintain advanced UVM verification environments, including agents, sequences, scoreboards, virtual sequences, and register models.
Perform constraint-driven random testing, debug complex SoC designs, and ensure functional coverage and assertion goals are met.
Analyze simulation results using industry-leading simulation tools (e.g., Cadence Xcelium, Synopsys VCS, Mentor Questa) and debug waveforms to validate design functionality.
Collaborate with cross-functional teams to identify and resolve issues, ensuring high-quality ASIC/SoC deliverables.
Required Skills and Qualifications
15+ years of experience in ASIC/SoC verification with a proven track record of owning verification from test plan to coverage closure.
Strong expertise in SystemVerilog and UVM methodology, including developing environments from scratch.
Deep understanding of randomization, constraints, functional coverage, and assertions (SVA).
Hands-on experience in test planning, coverage analysis, and debugging of complex SoC designs.
Proficiency with industry-standard simulation tools (e.g., Cadence Xcelium, Synopsys VCS, Mentor Questa) and waveform debugging.
Preferred Skills and Experience
Experience verifying networking ASICs or router datapath/control blocks, such as packet processing, forwarding engines, or fabric interfaces.
Familiarity with high-speed interconnects, buffers, or scheduling pipelines in large networking SoCs.
Exposure to emulation environments, hardware acceleration, or traffic-model integration.
Knowledge of coverage analytics, regression dashboards, and continuous-integration flows (e.g., Jenkins).
Understanding of low-power (UPF) or formal verification methodologies.
Own and drive block-level/subsystem/FullChip verification efforts, from creating test plans to achieving comprehensive coverage closure
Experience with post-silicon bring-up and debug is a plus.
Familiarity with emulation environments and debug flows is desirable.
Accessibility
HPE is committed to creating an inclusive and accessible workplace and encourages applications from all qualified individuals, including those with disabilities. If you believe you require accommodation during any stage of the application or interview process, please submit your request by completing our secure form linked here.
Note: This option is reserved for applicants needing assistance/reasonable accommodation related to a disability.
What We Can Offer You
Health & Wellbeing
We strive to provide our team members and their loved ones with a comprehensive suite of benefits that supports their physical, financial and emotional wellbeing.
Personal & Professional Development
We also invest in your career because the better you are, the better we all are. We have specific programs catered to helping you reach any career goals you have — whether you want to become a knowledge expert in your field or apply your skills to another division.
Unconditional Inclusion
We are unconditionally inclusive in the way we work and celebrate individual uniqueness. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good.
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Job
- Engineering
- Job Level:
- TCP_05
- "The expected salary/wage range for this position is provided below. Actual offer may vary from this range based upon geographic location, work experience, education/training, and/or skill level.
- United States of America: Annual Salary USD 181,000 - 367,000 in California
- The listed salary range reflects base salary. Variable incentives may also be offered."
Information about employee benefits offered in the US can be found at https://myhperewards.com/main/new-hire-enrollment.html
HPE is an Equal Employment Opportunity/ Veterans/Disabled/LGBT employer. We do not discriminate on the basis of race, gender, or any other protected category, and all decisions we make are made on the basis of qualifications, merit, and business need. Our goal is to be one global team that is representative of our customers, in an inclusive environment where we can continue to innovate and grow together. Please click here: Equal Employment Opportunity.
Hewlett Packard Enterprise is EEO Protected Veteran/ Individual with Disabilities.
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